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Mariusz Szafranskifaf7a8e2017-08-02 18:51:47 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2017 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include "harcuvar_boardid.h"
18#include "gpio.h"
19#include "spd/spd.h"
20#include <console/console.h>
21#include <fsp/api.h>
22#include <fsp/soc_binding.h>
Mariusz Szafranskifaf7a8e2017-08-02 18:51:47 +020023
Julius Wernercd49cce2019-03-05 16:53:33 -080024#if CONFIG(ENABLE_FSP_MEMORY_DOWN)
Mariusz Szafranskifaf7a8e2017-08-02 18:51:47 +020025
26/*
27 * Define platform specific Memory Down Configure structure.
28 *
29 * If CONFIG_ENABLE_FSP_MEMORY_DOWN is enabled, the MEMORY_DOWN_CONFIG
30 * structure should be customized to match the design.
31 *
32 * .SlotState indicates the memory down state of the specific channel/DIMM.
33 *
34 * SlotState options:
35 *
36 * STATE_MEMORY_DOWN: Memory down.
37 * STATE_MEMORY_SLOT: Physical memory slot.
38 *
39 * .SpdDataLen should always be MAX_SPD_BYTES/512.
40 *
41 * .SpdDataPtr is pointing to the SPD data structure when memory modules
42 * are memory down.
43 *
44 * SpdDataPtr options:
45 *
46 * Non-NULL: Pointing to SPD data structure.
47 * NULL: Physical memory slot, no SPD data used.
48 *
49 * DIMM Mapping of SlotState & SpdDataPtr:
50 *
51 * {{CH0DIMM0, CH0DIMM1}, {CH1DIMM0, CH1DIMM1}}
52 *
53 * Sample: Channel 0 is memory down and channel 1 is physical slot.
54 *
55 * const MEMORY_DOWN_CONFIG mMemoryDownConfig = {
56 * .SlotState = {
57 * {STATE_MEMORY_DOWN, STATE_MEMORY_DOWN},
58 * {STATE_MEMORY_SLOT, STATE_MEMORY_SLOT}
59 * },
60 * .SpdDataLen = MAX_SPD_BYTES,
61 * .SpdDataPtr = {
62 * {(void *)CONFIG_SPD_LOC, (void *)CONFIG_SPD_LOC},
63 * {(void *)NULL, (void *)NULL}
64 * }
65 * }
66 */
67
68const MEMORY_DOWN_CONFIG mMemoryDownConfig = {
69 .SlotState = {
70 {STATE_MEMORY_SLOT, STATE_MEMORY_SLOT},
71 {STATE_MEMORY_SLOT, STATE_MEMORY_SLOT}
72 },
73 .SpdDataLen = MAX_SPD_BYTES,
74 .SpdDataPtr = {
75 {(void *)NULL, (void *)NULL},
76 {(void *)NULL, (void *)NULL}
77 }
78};
79
80#endif /* CONFIG_ENABLE_FSP_MEMORY_DOWN */
81
82void mainboard_config_gpios(void);
83void mainboard_memory_init_params(FSPM_UPD *mupd);
84
85/*
86* Configure GPIO depend on platform
87*/
88void mainboard_config_gpios(void)
89{
90 size_t num;
Julien Viard de Galbert7ebb6b02018-03-01 16:03:31 +010091 const struct dnv_pad_config *table;
Mariusz Szafranskifaf7a8e2017-08-02 18:51:47 +020092 uint8_t boardid = board_id();
93
94 /* Configure pads prior to SiliconInit() in case there's any
95 * dependencies during hardware initialization.
96 */
97 switch (boardid) {
98 case BoardIdHarcuvar:
99 table = harcuvar_gpio_table;
100 num = ARRAY_SIZE(harcuvar_gpio_table);
101 break;
102 default:
103 table = NULL;
104 num = 0;
105 break;
106 }
107
108 if ((!table) || (!num)) {
109 printk(BIOS_ERR, "ERROR: No valid GPIO table found!\n");
110 return;
111 }
112
113 printk(BIOS_INFO, "GPIO table: 0x%x, entry num: 0x%x!\n",
114 (uint32_t)table, (uint32_t)num);
Julien Viard de Galbert7ebb6b02018-03-01 16:03:31 +0100115 gpio_configure_dnv_pads(table, num);
Mariusz Szafranskifaf7a8e2017-08-02 18:51:47 +0200116}
117
118void mainboard_memory_init_params(FSPM_UPD *mupd)
119{
Julius Wernercd49cce2019-03-05 16:53:33 -0800120#if CONFIG(ENABLE_FSP_MEMORY_DOWN)
Mariusz Szafranskifaf7a8e2017-08-02 18:51:47 +0200121 uint8_t *spd_data_ptr = NULL;
122
123 /* Get SPD data pointer */
124 spd_data_ptr = mainboard_find_spd_data();
125
126 if (spd_data_ptr != NULL) {
127 printk(BIOS_DEBUG, "Memory Down function is enabled!\n");
128
129 /* Enable Memory Down function, set Memory
130 * Down Configure structure pointer.
131 */
132 mupd->FspmConfig.PcdMemoryDown = 1;
133 mupd->FspmConfig.PcdMemoryDownConfigPtr =
134 (uint32_t)&mMemoryDownConfig;
135 } else {
136 printk(BIOS_DEBUG, "Memory Down function is disabled!\n");
137
138 /* Disable Memory Down function */
139 mupd->FspmConfig.PcdMemoryDown = 0;
140 mupd->FspmConfig.PcdMemoryDownConfigPtr = 0;
141 }
142#endif /* CONFIG_ENABLE_FSP_MEMORY_DOWN */
143}