blob: 0440994f5af0581c9a4e7ea3085ba16ae869b1bb [file] [log] [blame]
zhaojohn53461ad2017-08-21 21:50:10 -04001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2017 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <arch/acpi.h>
17#include <baseboard/variants.h>
Kyösti Mälkki17887d02019-07-23 19:08:01 +030018#include <boot/coreboot_tables.h>
zhaojohn53461ad2017-08-21 21:50:10 -040019#include <gpio.h>
zhaojohn53461ad2017-08-21 21:50:10 -040020#include <soc/gpio.h>
21#include <variant/gpio.h>
22#include <vendorcode/google/chromeos/chromeos.h>
23
zhaojohn53461ad2017-08-21 21:50:10 -040024void fill_lb_gpios(struct lb_gpios *gpios)
25{
26 struct lb_gpio chromeos_gpios[] = {
27 {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
zhaojohn53461ad2017-08-21 21:50:10 -040028 {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
29 {-1, ACTIVE_HIGH, 0, "power"},
30 {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
31 };
32 lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
33}
zhaojohn53461ad2017-08-21 21:50:10 -040034
35int get_lid_switch(void)
36{
37 /* Lid always open */
38 return 1;
39}
40
41int get_recovery_mode_switch(void)
42{
43 return 0;
44}
45
46int get_write_protect_state(void)
47{
48 /* No write protect */
49 return 0;
50}
51
52void mainboard_chromeos_acpi_generate(void)
53{
54 const struct cros_gpio *gpios;
55 size_t num;
56
57 gpios = variant_cros_gpios(&num);
58 chromeos_acpi_gpio_generate(gpios, num);
59}