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Martin Rothd75800c2014-05-12 21:56:27 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2013 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Martin Rothd75800c2014-05-12 21:56:27 -060014 */
15
Martin Rothbfca9842014-08-09 16:26:17 -060016#ifndef IRQROUTE_H
17#define IRQROUTE_H
18
Ben Gardnerfa6014a2015-12-08 21:20:25 -060019#include <soc/intel/fsp_baytrail/include/soc/irq.h>
20#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
Martin Rothd75800c2014-05-12 21:56:27 -060021
22/*
Elyes HAOUAScd5f2b52018-05-28 13:35:35 +020023 *IR02h GFX INT(A) - PIRQ A
Martin Rothd75800c2014-05-12 21:56:27 -060024 *IR10h EMMC INT(ABCD) - PIRQ DEFG
Elyes HAOUAScd5f2b52018-05-28 13:35:35 +020025 *IR11h SDIO INT(A) - PIRQ B
26 *IR12h SD INT(A) - PIRQ C
27 *IR13h SATA INT(A) - PIRQ D
28 *IR14h XHCI INT(A) - PIRQ E
29 *IR15h LP Audio INT(A) - PIRQ F
30 *IR17h MMC INT(A) - PIRQ F
Martin Rothd75800c2014-05-12 21:56:27 -060031 *IR18h SIO INT(ABCD) - PIRQ BADC
32 *IR1Ah TXE INT(A) - PIRQ F
33 *IR1Bh HD Audio INT(A) - PIRQ G
34 *IR1Ch PCIe INT(ABCD) - PIRQ EFGH
35 *IR1Dh EHCI INT(A) - PIRQ D
36 *IR1Eh SIO INT(ABCD) - PIRQ BDEF
37 *IR1Fh LPC INT(ABCD) - PIRQ HGBC
38 */
Martin Rothd08057a2015-02-12 22:51:57 -070039
40/* PCIe bridge routing */
41#define BRIDGE1_DEV PCIE_DEV
42
43/* PCI bridge IRQs need to be updated in both tables and need to match */
44#define PCIE_BRIDGE_IRQ_ROUTES \
45 PCIE_BRIDGE_DEV(RP, BRIDGE1_DEV, E, F, G, H)
46
Martin Rothcf752fe2015-12-02 16:20:53 -070047/* Devices set as A, A, A, A evaluate as 0, and don't get set */
Martin Rothd75800c2014-05-12 21:56:27 -060048#define PCI_DEV_PIRQ_ROUTES \
Martin Rothcf752fe2015-12-02 16:20:53 -070049 PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, B), \
Martin Rothd08057a2015-02-12 22:51:57 -070050 PCI_DEV_PIRQ_ROUTE(EMMC_DEV, D, E, F, G), \
51 PCI_DEV_PIRQ_ROUTE(SDIO_DEV, B, A, A, A), \
52 PCI_DEV_PIRQ_ROUTE(SD_DEV, C, A, A, A), \
53 PCI_DEV_PIRQ_ROUTE(SATA_DEV, D, A, A, A), \
54 PCI_DEV_PIRQ_ROUTE(XHCI_DEV, E, A, A, A), \
55 PCI_DEV_PIRQ_ROUTE(LPE_DEV, F, A, A, A), \
56 PCI_DEV_PIRQ_ROUTE(MMC45_DEV, F, A, A, A), \
57 PCI_DEV_PIRQ_ROUTE(SIO1_DEV, B, A, D, C), \
58 PCI_DEV_PIRQ_ROUTE(TXE_DEV, F, A, A, A), \
59 PCI_DEV_PIRQ_ROUTE(HDA_DEV, G, A, A, A), \
60 PCI_DEV_PIRQ_ROUTE(BRIDGE1_DEV, E, F, G, H), \
61 PCI_DEV_PIRQ_ROUTE(EHCI_DEV, D, A, A, A), \
62 PCI_DEV_PIRQ_ROUTE(SIO2_DEV, B, D, E, F), \
63 PCI_DEV_PIRQ_ROUTE(PCU_DEV, H, G, B, C)
Martin Rothd75800c2014-05-12 21:56:27 -060064
65/*
66 * Route each PIRQ[A-H] to a PIC IRQ[0-15]
67 * Reserved: 0, 1, 2, 8, 13
68 * PS2 keyboard: 12
69 * ACPI/SCI: 9
70 * Floppy: 6
71 */
72#define PIRQ_PIC_ROUTES \
73 PIRQ_PIC(A, 4), \
74 PIRQ_PIC(B, 5), \
75 PIRQ_PIC(C, 7), \
76 PIRQ_PIC(D, 10), \
77 PIRQ_PIC(E, 11), \
78 PIRQ_PIC(F, 12), \
79 PIRQ_PIC(G, 14), \
80 PIRQ_PIC(H, 15)
Martin Rothbfca9842014-08-09 16:26:17 -060081
82#endif /* IRQROUTE_H */