Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | |
| 21 | #include <console/console.h> |
| 22 | #include <arch/smp/mpspec.h> |
| 23 | #include <device/pci.h> |
| 24 | #include <arch/io.h> |
| 25 | #include <string.h> |
| 26 | #include <stdint.h> |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 27 | #include <cpu/amd/amdfam14.h> |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 28 | #include <SBPLATFORM.h> |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 29 | |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 30 | extern u8 bus_sb800[2]; |
| 31 | |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 32 | extern u32 apicid_sb800; |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 33 | |
| 34 | extern u32 bus_type[256]; |
| 35 | extern u32 sbdn_sb800; |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 36 | |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 37 | u8 intr_data[] = { |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 38 | [0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */ |
| 39 | [0x08] = 0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F, /* Misc-nil,0,1,2, INT from Serial irq */ |
| 40 | [0x10] = 0x09,0x1F,0x1F,0x10,0x1F,0x12,0x1F,0x00, |
| 41 | [0x18] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 42 | [0x20] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00, |
| 43 | [0x28] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 44 | [0x30] = 0x12,0x11,0x12,0x11,0x12,0x11,0x12,0x00, |
| 45 | [0x38] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 46 | [0x40] = 0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, |
| 47 | [0x48] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 48 | [0x50] = 0x10,0x11,0x12,0x13 |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 49 | }; |
| 50 | |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 51 | static void *smp_write_config_table(void *v) |
| 52 | { |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 53 | struct mp_config_table *mc; |
| 54 | int bus_isa; |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 55 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 56 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 57 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 58 | mptable_init(mc, LAPIC_ADDR); |
| 59 | memcpy(mc->mpc_oem, "AMD ", 8); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 60 | |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 61 | smp_write_processors(mc); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 62 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 63 | get_bus_conf(); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 64 | |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 65 | mptable_write_buses(mc, NULL, &bus_isa); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 66 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 67 | /* I/O APICs: APIC ID Version State Address */ |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 68 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 69 | u32 dword; |
| 70 | u8 byte; |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 71 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 72 | ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword); |
| 73 | dword &= 0xFFFFFFF0; |
| 74 | smp_write_ioapic(mc, apicid_sb800, 0x21, dword); |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 75 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 76 | for (byte = 0x0; byte < sizeof(intr_data); byte ++) { |
| 77 | outb(byte | 0x80, 0xC00); |
| 78 | outb(intr_data[byte], 0xC01); |
| 79 | } |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 80 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 81 | /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 82 | #define IO_LOCAL_INT(type, intr, apicid, pin) \ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 83 | smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin)); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 84 | |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 85 | mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 86 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 87 | /* PCI interrupts are level triggered, and are |
| 88 | * associated with a specific bus/device/function tuple. |
| 89 | */ |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 90 | #if CONFIG_GENERATE_ACPI_TABLES == 0 |
| 91 | #define PCI_INT(bus, dev, fn, pin) \ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 92 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 93 | #else |
| 94 | #define PCI_INT(bus, dev, fn, pin) |
| 95 | #endif |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 96 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 97 | /* APU Internal Graphic Device*/ |
| 98 | PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); |
| 99 | PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); |
Kerry Sheh | 28f1710 | 2011-12-22 12:18:26 +0800 | [diff] [blame] | 100 | |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 101 | //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 102 | PCI_INT(0x0, 0x14, 0x0, 0x10); |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 103 | /* Southbridge HD Audio: */ |
| 104 | PCI_INT(0x0, 0x14, 0x2, 0x12); |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 105 | |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 106 | PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 107 | PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]); |
| 108 | PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]); |
| 109 | PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]); |
| 110 | PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]); |
| 111 | PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 112 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 113 | /* sata */ |
| 114 | PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 115 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 116 | /* on board NIC & Slot PCIE. */ |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 117 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 118 | /* PCI slots */ |
| 119 | /* PCI_SLOT 0. */ |
| 120 | PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14); |
| 121 | PCI_INT(bus_sb800[1], 0x5, 0x1, 0x15); |
| 122 | PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16); |
| 123 | PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 124 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 125 | /* PCI_SLOT 1. */ |
| 126 | PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15); |
| 127 | PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16); |
| 128 | PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17); |
| 129 | PCI_INT(bus_sb800[1], 0x6, 0x3, 0x14); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 130 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 131 | /* PCI_SLOT 2. */ |
| 132 | PCI_INT(bus_sb800[1], 0x7, 0x0, 0x16); |
| 133 | PCI_INT(bus_sb800[1], 0x7, 0x1, 0x17); |
| 134 | PCI_INT(bus_sb800[1], 0x7, 0x2, 0x14); |
| 135 | PCI_INT(bus_sb800[1], 0x7, 0x3, 0x15); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 136 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 137 | PCI_INT(bus_sb800[2], 0x0, 0x0, 0x12); |
| 138 | PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13); |
| 139 | PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 140 | |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 141 | /* PCIe PortA */ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 142 | PCI_INT(0x0, 0x15, 0x0, 0x10); |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 143 | /* PCIe PortB */ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 144 | PCI_INT(0x0, 0x15, 0x1, 0x11); |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 145 | /* PCIe PortC */ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 146 | PCI_INT(0x0, 0x15, 0x2, 0x12); |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 147 | /* PCIe PortD */ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 148 | PCI_INT(0x0, 0x15, 0x3, 0x13); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 149 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 150 | /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 151 | IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); |
| 152 | IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 153 | /* There is no extension information... */ |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 154 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 155 | /* Compute the checksums */ |
| 156 | return mptable_finalize(mc); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 157 | } |
| 158 | |
| 159 | unsigned long write_smp_table(unsigned long addr) |
| 160 | { |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame^] | 161 | void *v; |
| 162 | v = smp_write_floating_table(addr, 0); |
| 163 | return (unsigned long)smp_write_config_table(v); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 164 | } |