| Steven J. Magnani | 61764f4 | 2005-09-13 14:54:25 +0000 | [diff] [blame] | 1 | /*
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| 2 | * $Header: /home/cvs/BIR/ca-cpu/freebios/src/include/spd.h,v 1.1 2005/07/11 16:03:54 smagnani Exp $
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| 3 | *
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| 4 | * spd.h: Definitions for Serial Presence Detect (SPD) data
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| 5 | * stored on SDRAM modules
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| 6 | *
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| 7 | * Copyright (C) 2005 Digital Design Corporation
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| 8 | *
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| 9 | * This program is free software; you can redistribute it and/or modify
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| 10 | * it under the terms of the GNU General Public License as published by
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| 11 | * the Free Software Foundation; either version 2 of the License, or
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| 12 | * (at your option) any later version.
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| 13 | *
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| 14 | * This program is distributed in the hope that it will be useful,
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| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 17 | * GNU General Public License for more details.
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| 18 | *
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| 19 | * You should have received a copy of the GNU General Public License
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| 20 | * along with this program; if not, write to the Free Software
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| Stefan Reinauer | 6ab43fc | 2005-10-05 18:17:45 +0000 | [diff] [blame] | 21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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| Steven J. Magnani | 61764f4 | 2005-09-13 14:54:25 +0000 | [diff] [blame] | 22 | *
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| 23 | * $Log: spd.h,v $
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| 24 | * Revision 1.1 2005/07/11 16:03:54 smagnani
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| 25 | * Initial revision.
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| 26 | *
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| 27 | *
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| 28 | */
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| 29 |
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| 30 | #ifndef __SPD_H_DEFINED
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| 31 | #define __SPD_H_DEFINED
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| 32 |
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| 33 | // Byte numbers
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| 34 | #define SPD_MEMORY_TYPE 2
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| 35 | #define SPD_NUM_ROWS 3
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| 36 | #define SPD_NUM_COLUMNS 4
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| 37 | #define SPD_NUM_DIMM_BANKS 5
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| 38 | #define SPD_MODULE_DATA_WIDTH_LSB 6
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| 39 | #define SPD_MODULE_DATA_WIDTH_MSB 7
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| 40 | #define SPD_MODULE_VOLTAGE 8
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| 41 | #define SPD_MIN_CYCLE_TIME_AT_CAS_MAX 9
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| 42 | #define SPD_DIMM_CONFIG_TYPE 11
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| 43 | #define SPD_REFRESH 12
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| 44 | #define SPD_PRIMARY_DRAM_WIDTH 13
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| 45 | #define SPD_SUPPORTED_BURST_LENGTHS 16
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| 46 | #define SPD_NUM_BANKS_PER_DRAM 17
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| 47 | #define SPD_ACCEPTABLE_CAS_LATENCIES 18
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| 48 | #define SPD_MODULE_ATTRIBUTES 21
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| 49 | #define SPD_MIN_CYCLE_TIME_AT_CAS_REDUCED_05 23
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| 50 | #define SPD_MIN_CYCLE_TIME_AT_CAS_REDUCED_10 25
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| 51 | #define SPD_MIN_ROW_PRECHARGE_TIME 27
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| 52 | #define SPD_MIN_RAS_TO_CAS_DELAY 29
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| 53 | #define SPD_MIN_ACTIVE_TO_PRECHARGE_DELAY 30
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| 54 | #define SPD_ADDRESS_CMD_HOLD 33
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| 55 |
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| 56 |
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| 57 | // SPD_MEMORY_TYPE values
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| 58 | #define MEMORY_TYPE_SDRAM_DDR 7
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| 59 |
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| 60 | // SPD_MODULE_VOLTAGE values
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| 61 | #define SPD_VOLTAGE_SSTL2 4
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| 62 |
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| 63 | // SPD_DIMM_CONFIG_TYPE values
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| 64 | #define ERROR_SCHEME_NONE 0
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| 65 | #define ERROR_SCHEME_PARITY 1
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| 66 | #define ERROR_SCHEME_ECC 2
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| 67 |
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| 68 | // SPD_ACCEPTABLE_CAS_LATENCIES values
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| 69 | #define SPD_CAS_LATENCY_1_0 0x01
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| 70 | #define SPD_CAS_LATENCY_1_5 0x02
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| 71 | #define SPD_CAS_LATENCY_2_0 0x04
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| 72 | #define SPD_CAS_LATENCY_2_5 0x08
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| 73 | #define SPD_CAS_LATENCY_3_0 0x10
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| 74 | #define SPD_CAS_LATENCY_3_5 0x20
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| 75 | #define SPD_CAS_LATENCY_4_0 0x40
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| 76 |
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| 77 | // SPD_SUPPORTED_BURST_LENGTHS values
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| 78 | #define SPD_BURST_LENGTH_1 1
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| 79 | #define SPD_BURST_LENGTH_2 2
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| 80 | #define SPD_BURST_LENGTH_4 4
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| 81 | #define SPD_BURST_LENGTH_8 8
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| 82 | #define SPD_BURST_LENGTH_PAGE (1<<7)
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| 83 |
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| 84 |
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| 85 | // SPD_MODULE_ATTRIBUTES values
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| 86 | #define MODULE_BUFFERED 1
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| 87 | #define MODULE_REGISTERED 2
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| 88 |
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| 89 | #endif // __SPD_H_DEFINED
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