blob: 238ff6b7875abac015d0bbcfac6e0961405518d4 [file] [log] [blame]
Steven J. Magnani61764f42005-09-13 14:54:25 +00001/*
2 * $Header: /home/cvs/BIR/ca-cpu/freebios/src/include/sdram_mode.h,v 1.1 2005/07/11 16:03:54 smagnani Exp $
3 *
4 * sdram_mode.h: Definitions for SDRAM Mode Register and Extended Mode Register
5 *
6 *
7 * Copyright (C) 2005 Digital Design Corporation
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
Stefan Reinauer6ab43fc2005-10-05 18:17:45 +000021 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Steven J. Magnani61764f42005-09-13 14:54:25 +000022 *
23 * $Log: sdram_mode.h,v $
24 * Revision 1.1 2005/07/11 16:03:54 smagnani
25 * Initial revision.
26 *
27 *
28 */
29
30#ifndef __SDRAMMODE_H_DEFINED
31#define __SDRAMMODE_H_DEFINED
32
33// SDRAM Mode Register definitions, per JESD79D
34// These are transmitted via A0-A13
35
36// Burst length
37#define SDRAM_BURST_2 (1<<0)
38#define SDRAM_BURST_4 (2<<0)
39#define SDRAM_BURST_8 (3<<0)
40
41#define SDRAM_BURST_SEQUENTIAL (0<<3)
42#define SDRAM_BURST_INTERLEAVED (1<<3)
43
44#define SDRAM_CAS_2_0 (2<<4)
45#define SDRAM_CAS_3_0 (3<<4) /* Optional for DDR 200-333 */
46#define SDRAM_CAS_1_5 (5<<4) /* Optional */
47#define SDRAM_CAS_2_5 (6<<4)
48#define SDRAM_CAS_MASK (7<<4)
49
50#define SDRAM_MODE_NORMAL (0 << 7)
51#define SDRAM_MODE_TEST (1 << 7)
52#define SDRAM_MODE_DLL_RESET (2 << 7)
53
54// Extended Mode Register
55
56#define SDRAM_EXTMODE_DLL_ENABLE (0 << 0)
57#define SDRAM_EXTMODE_DLL_DISABLE (1 << 0)
58
59#define SDRAM_EXTMODE_DRIVE_NORMAL (0 << 1)
60#define SDRAM_EXTMODE_DRIVE_WEAK (1 << 1) /* Optional */
61
62#endif // __SDRAMMODE_H_DEFINED