blob: 369bc6b9e019feda2c07382fcbfd8de94263ef7c [file] [log] [blame]
Keith Huiec42c2e2010-03-05 16:31:41 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Keith Hui <buurin@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <arch/pirq_routing.h>
22
23const struct irq_routing_table intel_irq_routing_table = {
24 PIRQ_SIGNATURE,
25 PIRQ_VERSION,
26 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
27 0x00, /* Interrupt router bus */
28 (0x04 << 3) | 0x0, /* Interrupt router device */
29 0, /* IRQs devoted exclusively to PCI usage */
30 0x8086, /* Vendor */
31 0x122e, /* Device */
32 0, /* Miniport */
33 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
34 0x10, /* Checksum (has to be set to some value that
35 * would give 0 after the sum of all bytes
36 * for this structure (including checksum).
37 */
38 {
39 /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
40 {0x00, (0x0c << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x1, 0x0},
41 {0x00, (0x0b << 3) | 0x0, {{0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}}, 0x2, 0x0},
42 {0x00, (0x0a << 3) | 0x0, {{0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}}, 0x3, 0x0},
43 {0x00, (0x09 << 3) | 0x0, {{0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}}, 0x4, 0x0},
44 {0x00, (0x04 << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x0, 0x0},
45 {0x00, (0x01 << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x0, 0x0},
46 {0x00, (0x06 << 3) | 0x0, {{0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}}, 0x0, 0x0},
47 {0x00, (0x07 << 3) | 0x0, {{0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}}, 0x0, 0x0},
48 }
49};
50
51unsigned long write_pirq_routing_table(unsigned long addr)
52{
53 return copy_pirq_routing_table(addr);
54}