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Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Patrick Georgi0588d192009-08-12 15:00:51 +000016
Uwe Hermannad8c95f2012-04-12 22:00:03 +020017mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000018
Uwe Hermannc04be932009-10-05 13:55:28 +000019menu "General setup"
20
Lee Leahybb70c402017-04-03 07:38:20 -070021config COREBOOT_BUILD
22 bool
23 default y
24
Uwe Hermannc04be932009-10-05 13:55:28 +000025config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000026 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000027 help
28 Append an extra string to the end of the coreboot version.
29
Uwe Hermann168b11b2009-10-07 16:15:40 +000030 This can be useful if, for instance, you want to append the
31 respective board's hostname or some other identifying string to
32 the coreboot version number, so that you can easily distinguish
33 boot logs of different boards from each other.
34
Arthur Heymans6f751542019-06-08 11:28:52 +020035config CONFIGURABLE_CBFS_PREFIX
36 bool
37 help
38 Select this to prompt to use to configure the prefix for cbfs files.
39
Patrick Georgi4b8a2412010-02-09 19:35:16 +000040config CBFS_PREFIX
Arthur Heymans6f751542019-06-08 11:28:52 +020041 string "CBFS prefix to use" if CONFIGURABLE_CBFS_PREFIX
Patrick Georgi4b8a2412010-02-09 19:35:16 +000042 default "fallback"
43 help
44 Select the prefix to all files put into the image. It's "fallback"
45 by default, "normal" is a common alternative.
46
Patrick Georgi23d89cc2010-03-16 01:17:19 +000047choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020048 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000049 default COMPILER_GCC
50 help
51 This option allows you to select the compiler used for building
52 coreboot.
Martin Rotha5a628e82016-01-19 12:01:09 -070053 You must build the coreboot crosscompiler for the board that you
54 have selected.
55
56 To build all the GCC crosscompilers (takes a LONG time), run:
57 make crossgcc
58
59 For help on individual architectures, run the command:
60 make help_toolchain
Patrick Georgi23d89cc2010-03-16 01:17:19 +000061
62config COMPILER_GCC
63 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020064 help
65 Use the GNU Compiler Collection (GCC) to build coreboot.
66
67 For details see http://gcc.gnu.org.
68
Patrick Georgi23d89cc2010-03-16 01:17:19 +000069config COMPILER_LLVM_CLANG
Martin Rotha5a628e82016-01-19 12:01:09 -070070 bool "LLVM/clang (TESTING ONLY - Not currently working)"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020071 help
Martin Rotha5a628e82016-01-19 12:01:09 -070072 Use LLVM/clang to build coreboot. To use this, you must build the
73 coreboot version of the clang compiler. Run the command
74 make clang
75 Note that this option is not currently working correctly and should
76 really only be selected if you're trying to work on getting clang
77 operational.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020078
79 For details see http://clang.llvm.org.
80
Patrick Georgi23d89cc2010-03-16 01:17:19 +000081endchoice
82
Patrick Georgi9b0de712013-12-29 18:45:23 +010083config ANY_TOOLCHAIN
84 bool "Allow building with any toolchain"
85 default n
Patrick Georgi9b0de712013-12-29 18:45:23 +010086 help
87 Many toolchains break when building coreboot since it uses quite
88 unusual linker features. Unless developers explicitely request it,
89 we'll have to assume that they use their distro compiler by mistake.
90 Make sure that using patched compilers is a conscious decision.
91
Patrick Georgi516a2a72010-03-25 21:45:25 +000092config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +020093 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +000094 default n
95 help
96 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020097
98 Requires the ccache utility in your system $PATH.
99
100 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +0000101
Sol Boucher69b88bf2015-02-26 11:47:19 -0800102config FMD_GENPARSER
103 bool "Generate flashmap descriptor parser using flex and bison"
104 default n
Sol Boucher69b88bf2015-02-26 11:47:19 -0800105 help
106 Enable this option if you are working on the flashmap descriptor
107 parser and made changes to fmd_scanner.l or fmd_parser.y.
108
109 Otherwise, say N to use the provided pregenerated scanner/parser.
110
Martin Rothf411b702017-04-09 19:12:42 -0600111config UTIL_GENPARSER
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100112 bool "Generate SCONFIG & BINCFG parser using flex and bison"
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000113 default n
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000114 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200115 Enable this option if you are working on the sconfig device tree
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100116 parser or bincfg and made changes to the .l or .y files.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200117
Sol Boucher69b88bf2015-02-26 11:47:19 -0800118 Otherwise, say N to use the provided pregenerated scanner/parser.
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000119
Joe Korty6d772522010-05-19 18:41:15 +0000120config USE_OPTION_TABLE
121 bool "Use CMOS for configuration values"
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000122 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000123 help
124 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200125 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000126
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600127config STATIC_OPTION_TABLE
128 bool "Load default configuration values into CMOS on each boot"
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600129 depends on USE_OPTION_TABLE
130 help
131 Enable this option to reset "CMOS" NVRAM values to default on
132 every boot. Use this if you want the NVRAM configuration to
133 never be modified from its default values.
134
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000135config COMPRESS_RAMSTAGE
136 bool "Compress ramstage with LZMA"
Subrata Banikb5962a92019-06-08 12:29:02 +0530137 depends on HAVE_RAMSTAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700138 # Default value set at the end of the file
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000139 help
140 Compress ramstage to save memory in the flash image. Note
141 that decompression might slow down booting if the boot flash
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200142 is connected through a slow link (i.e. SPI).
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000143
Julius Werner09f29212015-09-29 13:51:35 -0700144config COMPRESS_PRERAM_STAGES
145 bool "Compress romstage and verstage with LZ4"
Subrata Banikb5962a92019-06-08 12:29:02 +0530146 depends on !ARCH_X86 && (HAVE_ROMSTAGE || HAVE_VERSTAGE)
Martin Roth75e5cb72016-12-15 15:05:37 -0700147 # Default value set at the end of the file
Julius Werner09f29212015-09-29 13:51:35 -0700148 help
149 Compress romstage and (if it exists) verstage with LZ4 to save flash
150 space and speed up boot, since the time for reading the image from SPI
151 (and in the vboot case verifying it) is usually much greater than the
152 time spent decompressing. Doesn't work for XIP stages (assume all
153 ARCH_X86 for now) for obvious reasons.
154
Julius Werner99f46832018-05-16 14:14:04 -0700155config COMPRESS_BOOTBLOCK
156 bool
Subrata Banikb5962a92019-06-08 12:29:02 +0530157 depends on HAVE_BOOTBLOCK
Julius Werner99f46832018-05-16 14:14:04 -0700158 help
159 This option can be used to compress the bootblock with LZ4 and attach
160 a small self-decompression stub to its front. This can drastically
161 reduce boot time on platforms where the bootblock is loaded over a
162 very slow connection and bootblock size trumps all other factors for
Jonathan Neuschäfer2930a722018-09-29 17:42:52 +0200163 speed. Since using this option usually requires changes to the
Julius Werner99f46832018-05-16 14:14:04 -0700164 SoC memlayout and possibly extra support code, it should not be
165 user-selectable. (There's no real point in offering this to the user
166 anyway... if it works and saves boot time, you would always want it.)
167
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200168config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200169 bool "Include the coreboot .config file into the ROM image"
Martin Roth75e5cb72016-12-15 15:05:37 -0700170 # Default value set at the end of the file
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200171 help
172 Include the .config file that was used to compile coreboot
173 in the (CBFS) ROM image. This is useful if you want to know which
174 options were used to build a specific coreboot.rom image.
175
Daniele Forsi53847a22014-07-22 18:00:56 +0200176 Saying Y here will increase the image size by 2-3KB.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200177
178 You can use the following command to easily list the options:
179
180 grep -a CONFIG_ coreboot.rom
181
182 Alternatively, you can also use cbfstool to print the image
183 contents (including the raw 'config' item we're looking for).
184
185 Example:
186
187 $ cbfstool coreboot.rom print
188 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
189 offset 0x0
190 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600191
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200192 Name Offset Type Size
193 cmos_layout.bin 0x0 cmos layout 1159
194 fallback/romstage 0x4c0 stage 339756
Daniele Forsi53847a22014-07-22 18:00:56 +0200195 fallback/ramstage 0x53440 stage 186664
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200196 fallback/payload 0x80dc0 payload 51526
197 config 0x8d740 raw 3324
198 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200199
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700200config COLLECT_TIMESTAMPS
201 bool "Create a table of timestamps collected during boot"
Paul Menzel4e4a7632015-10-11 11:57:44 +0200202 default y if ARCH_X86
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700203 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200204 Make coreboot create a table of timer-ID/timer-value pairs to
205 allow measuring time spent at different phases of the boot process.
206
Martin Rothb22bbe22018-03-07 15:32:16 -0700207config TIMESTAMPS_ON_CONSOLE
208 bool "Print the timestamp values on the console"
209 default n
210 depends on COLLECT_TIMESTAMPS
211 help
212 Print the timestamps to the debug console if enabled at level spew.
213
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200214config USE_BLOBS
215 bool "Allow use of binary-only repository"
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200216 help
217 This draws in the blobs repository, which contains binary files that
218 might be required for some chipsets or boards.
219 This flag ensures that a "Free" option remains available for users.
220
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800221config COVERAGE
222 bool "Code coverage support"
223 depends on COMPILER_GCC
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800224 help
225 Add code coverage support for coreboot. This will store code
226 coverage information in CBMEM for extraction from user space.
227 If unsure, say N.
228
Ryan Salsamendiab37e9a2017-06-11 21:07:31 -0700229config UBSAN
230 bool "Undefined behavior sanitizer support"
231 default n
232 help
233 Instrument the code with checks for undefined behavior. If unsure,
234 say N because it adds a small performance penalty and may abort
235 on code that happens to work in spite of the UB.
236
Kyösti Mälkki7904e722018-06-03 14:55:10 +0300237config NO_RELOCATABLE_RAMSTAGE
238 bool
239 default n if ARCH_X86
240 default y
241
Stefan Reinauer58470e32014-10-17 13:08:36 +0200242config RELOCATABLE_RAMSTAGE
Kyösti Mälkki730df3c2016-06-18 07:39:31 +0300243 bool
Kyösti Mälkki730df3c2016-06-18 07:39:31 +0300244 default !NO_RELOCATABLE_RAMSTAGE
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200245 select RELOCATABLE_MODULES
Stefan Reinauer58470e32014-10-17 13:08:36 +0200246 help
247 The reloctable ramstage support allows for the ramstage to be built
248 as a relocatable module. The stage loader can identify a place
249 out of the OS way so that copying memory is unnecessary during an S3
250 wake. When selecting this option the romstage is responsible for
251 determing a stack location to use for loading the ramstage.
252
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300253config TSEG_STAGE_CACHE
Arthur Heymans410f2562017-01-25 15:27:52 +0100254 bool
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300255 default y
256 depends on !NO_STAGE_CACHE && SMM_TSEG
Stefan Reinauer58470e32014-10-17 13:08:36 +0200257 help
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300258 The option enables stage cache support for platform. Platform
259 can stash copies of postcar, ramstage and raw runtime data
260 inside SMM TSEG, to be restored on S3 resume path.
261
262config CBMEM_STAGE_CACHE
263 bool "Cache stages in CBMEM"
264 depends on !NO_STAGE_CACHE && !TSEG_STAGE_CACHE
265 help
266 The option enables stage cache support for platform. Platform
267 can stash copies of postcar, ramstage and raw runtime data
268 inside CBMEM.
269
270 While the approach is faster than reloading stages from boot media
271 it is also a possible attack scenario via which OS can possibly
272 circumvent SMM locks and SPI write protections.
273
274 If unsure, select 'N'
Stefan Reinauer58470e32014-10-17 13:08:36 +0200275
Stefan Reinauer58470e32014-10-17 13:08:36 +0200276config UPDATE_IMAGE
277 bool "Update existing coreboot.rom image"
Stefan Reinauer58470e32014-10-17 13:08:36 +0200278 help
279 If this option is enabled, no new coreboot.rom file
280 is created. Instead it is expected that there already
281 is a suitable file for further processing.
282 The bootblock will not be modified.
283
Martin Roth5942e062016-01-20 14:59:21 -0700284 If unsure, select 'N'
285
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400286config BOOTSPLASH_IMAGE
287 bool "Add a bootsplash image"
288 help
289 Select this option if you have a bootsplash image that you would
290 like to add to your ROM.
291
292 This will only add the image to the ROM. To actually run it check
293 options under 'Display' section.
294
295config BOOTSPLASH_FILE
296 string "Bootsplash path and filename"
297 depends on BOOTSPLASH_IMAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700298 # Default value set at the end of the file
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400299 help
300 The path and filename of the file to use as graphical bootsplash
301 screen. The file format has to be jpg.
302
Nico Huber94cdec62019-06-06 19:36:02 +0200303config HAVE_RAMPAYLOAD
304 bool
305
Subrata Banik7e893a02019-05-06 14:17:41 +0530306config RAMPAYLOAD
307 bool "Enable coreboot flow without executing ramstage"
Subrata Banik86dbe0f2019-06-28 18:18:37 +0530308 default y if ARCH_X86
Nico Huber94cdec62019-06-06 19:36:02 +0200309 depends on HAVE_RAMPAYLOAD
Subrata Banik7e893a02019-05-06 14:17:41 +0530310 help
311 If this option is enabled, coreboot flow will skip ramstage
312 loading and execution of ramstage to load payload.
313
314 Instead it is expected to load payload from postcar stage itself.
315
316 In this flow coreboot will perform basic x86 initialization
317 (DRAM resource allocation), MTRR programming,
318 Skip PCI enumeration logic and only allocate BAR for fixed devices
319 (bootable devices, TPM over GSPI).
320
Uwe Hermannc04be932009-10-05 13:55:28 +0000321endmenu
322
Martin Roth026e4dc2015-06-19 23:17:15 -0600323menu "Mainboard"
324
Stefan Reinauera48ca842015-04-04 01:58:28 +0200325source "src/mainboard/Kconfig"
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000326
Marshall Dawsone9375132016-09-04 08:38:33 -0600327config DEVICETREE
328 string
329 default "devicetree.cb"
330 help
331 This symbol allows mainboards to select a different file under their
332 mainboard directory for the devicetree.cb file. This allows the board
333 variants that need different devicetrees to be in the same directory.
334
335 Examples: "devicetree.variant.cb"
336 "variant/devicetree.cb"
337
Furquan Shaikhf2419982018-06-21 18:50:48 -0700338config OVERRIDE_DEVICETREE
339 string
340 default ""
341 help
342 This symbol allows variants to provide an override devicetree file to
343 override the registers and/or add new devices on top of the ones
344 provided by baseboard devicetree using CONFIG_DEVICETREE.
345
346 Examples: "devicetree.variant-override.cb"
347 "variant/devicetree-override.cb"
348
Martin Roth026e4dc2015-06-19 23:17:15 -0600349config CBFS_SIZE
350 hex "Size of CBFS filesystem in ROM"
Martin Roth75e5cb72016-12-15 15:05:37 -0700351 # Default value set at the end of the file
Martin Roth026e4dc2015-06-19 23:17:15 -0600352 help
353 This is the part of the ROM actually managed by CBFS, located at the
354 end of the ROM (passed through cbfstool -o) on x86 and at at the start
355 of the ROM (passed through cbfstool -s) everywhere else. It defaults
356 to span the whole ROM on all but Intel systems that use an Intel Firmware
357 Descriptor. It can be overridden to make coreboot live alongside other
358 components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
359 binaries.
360
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200361config FMDFILE
362 string "fmap description file in fmd format"
Patrick Georgi5d7ab392015-12-12 00:23:15 +0100363 default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200364 default ""
365 help
366 The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
367 but in some cases more complex setups are required.
368 When an fmd is specified, it overrides the default format.
369
Martin Rothda1ca202015-12-26 16:51:16 -0700370endmenu
371
Martin Rothb09a5692016-01-24 19:38:33 -0700372# load site-local kconfig to allow user specific defaults and overrides
373source "site-local/Kconfig"
374
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200375config SYSTEM_TYPE_LAPTOP
Martin Roth595e7772015-04-26 18:53:26 -0600376 default n
377 bool
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200378
Duncan Laurie8312df42019-02-01 11:33:57 -0800379config SYSTEM_TYPE_TABLET
380 default n
381 bool
382
383config SYSTEM_TYPE_DETACHABLE
384 default n
385 bool
386
387config SYSTEM_TYPE_CONVERTIBLE
388 default n
389 bool
390
Werner Zehc0fb3612016-01-14 15:08:36 +0100391config CBFS_AUTOGEN_ATTRIBUTES
392 default n
393 bool
394 help
395 If this option is selected, every file in cbfs which has a constraint
396 regarding position or alignment will get an additional file attribute
397 which describes this constraint.
398
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000399menu "Chipset"
400
Duncan Lauried2119762015-06-08 18:11:56 -0700401comment "SoC"
Chris Chingaa8e5d32017-10-20 10:43:39 -0600402source "src/soc/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000403comment "CPU"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200404source "src/cpu/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000405comment "Northbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200406source "src/northbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000407comment "Southbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200408source "src/southbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000409comment "Super I/O"
Omar Pakker57603e22016-07-29 23:31:45 +0200410source "src/superio/*/*/Kconfig"
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000411comment "Embedded Controllers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200412source "src/ec/acpi/Kconfig"
413source "src/ec/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000414
Martin Roth59aa2b12015-06-20 16:17:12 -0600415source "src/southbridge/intel/common/firmware/Kconfig"
Martin Rothe1523ec2015-06-19 22:30:43 -0600416source "src/vendorcode/*/Kconfig"
Martin Roth59aa2b12015-06-20 16:17:12 -0600417
Martin Rothe1523ec2015-06-19 22:30:43 -0600418source "src/arch/*/Kconfig"
419
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000420endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000421
Stefan Reinauera48ca842015-04-04 01:58:28 +0200422source "src/device/Kconfig"
Stefan Reinauer95a63962012-11-13 17:00:01 -0800423
Rudolf Marekd9c25492010-05-16 15:31:53 +0000424menu "Generic Drivers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200425source "src/drivers/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800426source "src/drivers/*/*/Kconfig"
Lee Leahy48dbc662017-05-08 16:56:03 -0700427source "src/commonlib/storage/Kconfig"
Rudolf Marekd9c25492010-05-16 15:31:53 +0000428endmenu
429
Philipp Deppenwiese1899fbe2017-10-16 17:09:33 +0200430menu "Security"
431
432source "src/security/Kconfig"
433
434endmenu
435
Martin Roth09210a12016-05-17 11:28:23 -0600436source "src/acpi/Kconfig"
437
Aaron Durbin4a36c4e2016-08-11 11:02:26 -0500438# This option is for the current boards/chipsets where SPI flash
439# is not the boot device. Currently nearly all boards/chipsets assume
440# SPI flash is the boot device.
441config BOOT_DEVICE_NOT_SPI_FLASH
442 bool
443 default n
444
445config BOOT_DEVICE_SPI_FLASH
446 bool
447 default y if !BOOT_DEVICE_NOT_SPI_FLASH
448 default n
449
Aaron Durbin16c173f2016-08-11 14:04:10 -0500450config BOOT_DEVICE_MEMORY_MAPPED
451 bool
452 default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
453 default n
454 help
455 Inform system if SPI is memory-mapped or not.
456
Aaron Durbine8e118d2016-08-12 15:00:10 -0500457config BOOT_DEVICE_SUPPORTS_WRITES
458 bool
459 default n
460 help
461 Indicate that the platform has writable boot device
462 support.
463
Patrick Georgi0770f252015-04-22 13:28:21 +0200464config RTC
465 bool
466 default n
467
Patrick Georgi0588d192009-08-12 15:00:51 +0000468config HEAP_SIZE
469 hex
Marty E. Plummer0987e432019-04-22 20:46:27 -0500470 default 0x100000 if FLATTENED_DEVICE_TREE
Myles Watson04000f42009-10-16 19:12:49 +0000471 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000472
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700473config STACK_SIZE
474 hex
Julius Werner66a476a2015-10-12 16:45:21 -0700475 default 0x1000 if ARCH_X86
476 default 0x0
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700477
Patrick Georgi0588d192009-08-12 15:00:51 +0000478config MAX_CPUS
479 int
480 default 1
481
Stefan Reinauera48ca842015-04-04 01:58:28 +0200482source "src/console/Kconfig"
Patrick Georgi0588d192009-08-12 15:00:51 +0000483
484config HAVE_ACPI_RESUME
485 bool
486 default n
Kyösti Mälkki7cd2c072018-06-03 23:04:28 +0300487 depends on RELOCATABLE_RAMSTAGE
Patrick Georgi0588d192009-08-12 15:00:51 +0000488
Aaron Durbin87c9fae2016-01-22 15:26:04 -0600489config RESUME_PATH_SAME_AS_BOOT
490 bool
491 default y if ARCH_X86
492 depends on HAVE_ACPI_RESUME
493 help
494 This option indicates that when a system resumes it takes the
495 same path as a regular boot. e.g. an x86 system runs from the
496 reset vector at 0xfffffff0 on both resume and warm/cold boot.
497
Timothy Pearson44d53422015-05-18 16:04:10 -0500498config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
499 bool
500 default n
501
Timothy Pearson7b22d842015-08-28 19:52:05 -0500502config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
503 bool
504 default n
505 help
506 This should be enabled on certain plaforms, such as the AMD
507 SR565x, that cannot handle concurrent CBFS accesses from
508 multiple APs during early startup.
509
Timothy Pearsonc764c742015-08-28 20:48:17 -0500510config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
511 bool
512 default n
513
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300514config NO_MONOTONIC_TIMER
Aaron Durbina4217912013-04-29 22:31:51 -0500515 def_bool n
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300516
517config HAVE_MONOTONIC_TIMER
518 bool
519 depends on !NO_MONOTONIC_TIMER
Kyösti Mälkkib28b6b52019-07-01 15:38:25 +0300520 default y
Aaron Durbina4217912013-04-29 22:31:51 -0500521 help
522 The board/chipset provides a monotonic timer.
523
Aaron Durbine5e36302014-09-25 10:05:15 -0500524config GENERIC_UDELAY
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300525 bool
Aaron Durbine5e36302014-09-25 10:05:15 -0500526 depends on HAVE_MONOTONIC_TIMER
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300527 default y if !ARCH_X86
Aaron Durbine5e36302014-09-25 10:05:15 -0500528 help
529 The board/chipset uses a generic udelay function utilizing the
530 monotonic timer.
531
Aaron Durbin340ca912013-04-30 09:58:12 -0500532config TIMER_QUEUE
533 def_bool n
534 depends on HAVE_MONOTONIC_TIMER
535 help
Kyösti Mälkkiecd84242013-09-13 07:57:49 +0300536 Provide a timer queue for performing time-based callbacks.
Aaron Durbin340ca912013-04-30 09:58:12 -0500537
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500538config COOP_MULTITASKING
539 def_bool n
Aaron Durbin38c326d2013-05-06 12:22:23 -0500540 depends on TIMER_QUEUE && ARCH_X86
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500541 help
542 Cooperative multitasking allows callbacks to be multiplexed on the
543 main thread of ramstage. With this enabled it allows for multiple
544 execution paths to take place when they have udelay() calls within
545 their code.
546
547config NUM_THREADS
548 int
549 default 4
550 depends on COOP_MULTITASKING
551 help
552 How many execution threads to cooperatively multitask with.
553
Patrick Georgi0588d192009-08-12 15:00:51 +0000554config HAVE_OPTION_TABLE
555 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000556 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000557 help
558 This variable specifies whether a given board has a cmos.layout
559 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000560 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000561
Patrick Georgi0588d192009-08-12 15:00:51 +0000562config PCI_IO_CFG_EXT
563 bool
564 default n
565
566config IOAPIC
567 bool
568 default n
569
Myles Watson45bb25f2009-09-22 18:49:08 +0000570config USE_WATCHDOG_ON_BOOT
571 bool
572 default n
573
Myles Watson45bb25f2009-09-22 18:49:08 +0000574config GFXUMA
575 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000576 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000577 help
578 Enable Unified Memory Architecture for graphics.
579
Myles Watsonb8e20272009-10-15 13:35:47 +0000580config HAVE_ACPI_TABLES
581 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000582 help
583 This variable specifies whether a given board has ACPI table support.
584 It is usually set in mainboard/*/Kconfig.
Myles Watsonb8e20272009-10-15 13:35:47 +0000585
586config HAVE_MP_TABLE
587 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000588 help
589 This variable specifies whether a given board has MP table support.
590 It is usually set in mainboard/*/Kconfig.
591 Whether or not the MP table is actually generated by coreboot
592 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000593
594config HAVE_PIRQ_TABLE
595 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000596 help
597 This variable specifies whether a given board has PIRQ table support.
598 It is usually set in mainboard/*/Kconfig.
599 Whether or not the PIRQ table is actually generated by coreboot
600 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000601
Vladimir Serbinenkoc21e0732014-10-16 12:48:19 +0200602config COMMON_FADT
603 bool
604 default n
605
Aaron Durbin9420a522015-11-17 16:31:00 -0600606config ACPI_NHLT
607 bool
608 default n
609 help
610 Build support for NHLT (non HD Audio) ACPI table generation.
611
Marshall Dawson991467d2018-09-04 12:32:56 -0600612config ACPI_BERT
613 bool
614 depends on HAVE_ACPI_TABLES
615 help
616 Build an ACPI Boot Error Record Table.
617
Myles Watsond73c1b52009-10-26 15:14:07 +0000618#These Options are here to avoid "undefined" warnings.
619#The actual selection and help texts are in the following menu.
620
Uwe Hermann168b11b2009-10-07 16:15:40 +0000621menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000622
Myles Watsonb8e20272009-10-15 13:35:47 +0000623config GENERATE_MP_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800624 prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
625 bool
626 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000627 help
628 Generate an MP table (conforming to the Intel MultiProcessor
629 specification 1.4) for this board.
630
631 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000632
Myles Watsonb8e20272009-10-15 13:35:47 +0000633config GENERATE_PIRQ_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800634 prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE
635 bool
636 default HAVE_PIRQ_TABLE
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000637 help
638 Generate a PIRQ table for this board.
639
640 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000641
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200642config GENERATE_SMBIOS_TABLES
643 depends on ARCH_X86
644 bool "Generate SMBIOS tables"
645 default y
646 help
647 Generate SMBIOS tables for this board.
648
649 If unsure, say Y.
650
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200651config SMBIOS_PROVIDED_BY_MOBO
652 bool
653 default n
654
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200655config MAINBOARD_SERIAL_NUMBER
Nico Huberebd8a4f2017-11-01 09:49:16 +0100656 prompt "SMBIOS Serial Number" if !SMBIOS_PROVIDED_BY_MOBO
657 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200658 depends on GENERATE_SMBIOS_TABLES
659 default "123456789"
Martin Roth595e7772015-04-26 18:53:26 -0600660 help
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200661 The Serial Number to store in SMBIOS structures.
662
663config MAINBOARD_VERSION
Nico Huberebd8a4f2017-11-01 09:49:16 +0100664 prompt "SMBIOS Version Number" if !SMBIOS_PROVIDED_BY_MOBO
665 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200666 depends on GENERATE_SMBIOS_TABLES
667 default "1.0"
668 help
669 The Version Number to store in SMBIOS structures.
670
671config MAINBOARD_SMBIOS_MANUFACTURER
Nico Huberebd8a4f2017-11-01 09:49:16 +0100672 prompt "SMBIOS Manufacturer" if !SMBIOS_PROVIDED_BY_MOBO
673 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200674 depends on GENERATE_SMBIOS_TABLES
675 default MAINBOARD_VENDOR
676 help
677 Override the default Manufacturer stored in SMBIOS structures.
678
679config MAINBOARD_SMBIOS_PRODUCT_NAME
Nico Huberebd8a4f2017-11-01 09:49:16 +0100680 prompt "SMBIOS Product name" if !SMBIOS_PROVIDED_BY_MOBO
681 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200682 depends on GENERATE_SMBIOS_TABLES
683 default MAINBOARD_PART_NUMBER
684 help
685 Override the default Product name stored in SMBIOS structures.
686
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100687config SMBIOS_ENCLOSURE_TYPE
688 hex
689 depends on GENERATE_SMBIOS_TABLES
690 default 0x09 if SYSTEM_TYPE_LAPTOP
Duncan Laurie8312df42019-02-01 11:33:57 -0800691 default 0x1e if SYSTEM_TYPE_TABLET
692 default 0x1f if SYSTEM_TYPE_CONVERTIBLE
693 default 0x20 if SYSTEM_TYPE_DETACHABLE
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100694 default 0x03
695 help
696 System Enclosure or Chassis Types as defined in SMBIOS specification.
Duncan Laurie8312df42019-02-01 11:33:57 -0800697 The default value is SMBIOS_ENCLOSURE_DESKTOP (0x03) but laptop,
698 convertible, or tablet enclosure will be used if the appropriate
699 system type is selected.
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100700
Myles Watson45bb25f2009-09-22 18:49:08 +0000701endmenu
702
Martin Roth21c06502016-02-04 19:52:27 -0700703source "payloads/Kconfig"
Peter Stugea758ca22009-09-17 16:21:31 +0000704
Uwe Hermann168b11b2009-10-07 16:15:40 +0000705menu "Debugging"
706
Nico Huberd67edca2018-11-13 19:28:07 +0100707comment "CPU Debug Settings"
708source "src/cpu/*/Kconfig.debug"
709
710comment "General Debug Settings"
711
Uwe Hermann168b11b2009-10-07 16:15:40 +0000712# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000713config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000714 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200715 default n
Denis 'GNUtoo' Carikli3747ba12015-12-10 22:04:56 +0100716 depends on CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +0000717 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000718 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000719 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000720
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200721config GDB_WAIT
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100722 bool "Wait for a GDB connection in the ramstage"
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200723 default n
724 depends on GDB_STUB
725 help
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100726 If enabled, coreboot will wait for a GDB connection in the ramstage.
727
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200728
Julius Wernerd82e0cf2015-02-17 17:27:23 -0800729config FATAL_ASSERTS
730 bool "Halt when hitting a BUG() or assertion error"
731 default n
732 help
733 If enabled, coreboot will call hlt() on a BUG() or failed ASSERT().
734
Nico Huber371a6672018-11-13 22:06:40 +0100735config HAVE_DEBUG_GPIO
736 bool
737
738config DEBUG_GPIO
739 bool "Output verbose GPIO debug messages"
740 depends on HAVE_DEBUG_GPIO
741
Stefan Reinauerfe422182012-05-02 16:33:18 -0700742config DEBUG_CBFS
743 bool "Output verbose CBFS debug messages"
744 default n
Stefan Reinauerfe422182012-05-02 16:33:18 -0700745 help
746 This option enables additional CBFS related debug messages.
747
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000748config HAVE_DEBUG_RAM_SETUP
749 def_bool n
750
Uwe Hermann01ce6012010-03-05 10:03:50 +0000751config DEBUG_RAM_SETUP
752 bool "Output verbose RAM init debug messages"
753 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000754 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000755 help
756 This option enables additional RAM init related debug messages.
757 It is recommended to enable this when debugging issues on your
758 board which might be RAM init related.
759
760 Note: This option will increase the size of the coreboot image.
761
762 If unsure, say N.
763
Myles Watson80e914f2010-06-01 19:25:31 +0000764config DEBUG_PIRQ
765 bool "Check PIRQ table consistency"
766 default n
767 depends on GENERATE_PIRQ_TABLE
768 help
769 If unsure, say N.
770
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000771config HAVE_DEBUG_SMBUS
772 def_bool n
773
Uwe Hermann01ce6012010-03-05 10:03:50 +0000774config DEBUG_SMBUS
775 bool "Output verbose SMBus debug messages"
776 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000777 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000778 help
779 This option enables additional SMBus (and SPD) debug messages.
780
781 Note: This option will increase the size of the coreboot image.
782
783 If unsure, say N.
784
785config DEBUG_SMI
786 bool "Output verbose SMI debug messages"
787 default n
788 depends on HAVE_SMI_HANDLER
Nico Huber9e53db42018-06-05 22:34:08 +0200789 select SPI_FLASH_SMM if SPI_CONSOLE || CONSOLE_SPI_FLASH
Uwe Hermann01ce6012010-03-05 10:03:50 +0000790 help
791 This option enables additional SMI related debug messages.
792
793 Note: This option will increase the size of the coreboot image.
794
795 If unsure, say N.
796
Uwe Hermanna953f372010-11-10 00:14:32 +0000797# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
798# printk(BIOS_DEBUG, ...) calls.
799config DEBUG_MALLOC
Stefan Reinauer95a63962012-11-13 17:00:01 -0800800 prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
801 bool
Uwe Hermanna953f372010-11-10 00:14:32 +0000802 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000803 help
804 This option enables additional malloc related debug messages.
805
806 Note: This option will increase the size of the coreboot image.
807
808 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300809
810# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
811# printk(BIOS_DEBUG, ...) calls.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300812config DEBUG_ACPI
Stefan Reinauer95a63962012-11-13 17:00:01 -0800813 prompt "Output verbose ACPI debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
814 bool
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300815 default n
816 help
817 This option enables additional ACPI related debug messages.
818
819 Note: This option will slightly increase the size of the coreboot image.
820
821 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300822
Kyösti Mälkki66277952018-12-31 15:22:34 +0200823config DEBUG_CONSOLE_INIT
824 bool "Debug console initialisation code"
825 default n
826 help
827 With this option printk()'s are attempted before console hardware
828 initialisation has been completed. Your mileage may vary.
829
830 Typically you will need to modify source in console_hw_init() such
831 that a working console appears before the one you want to debug.
832
833 If unsure, say N.
834
Uwe Hermanna953f372010-11-10 00:14:32 +0000835# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
836# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000837config REALMODE_DEBUG
Stefan Reinauer95a63962012-11-13 17:00:01 -0800838 prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
839 bool
Myles Watson6c9bc012010-09-07 22:30:15 +0000840 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000841 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000842 help
843 This option enables additional x86emu related debug messages.
844
845 Note: This option will increase the time to emulate a ROM.
846
847 If unsure, say N.
848
Uwe Hermann01ce6012010-03-05 10:03:50 +0000849config X86EMU_DEBUG
850 bool "Output verbose x86emu debug messages"
851 default n
852 depends on PCI_OPTION_ROM_RUN_YABEL
853 help
854 This option enables additional x86emu related debug messages.
855
856 Note: This option will increase the size of the coreboot image.
857
858 If unsure, say N.
859
860config X86EMU_DEBUG_JMP
861 bool "Trace JMP/RETF"
862 default n
863 depends on X86EMU_DEBUG
864 help
865 Print information about JMP and RETF opcodes from x86emu.
866
867 Note: This option will increase the size of the coreboot image.
868
869 If unsure, say N.
870
871config X86EMU_DEBUG_TRACE
872 bool "Trace all opcodes"
873 default n
874 depends on X86EMU_DEBUG
875 help
876 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000877
Uwe Hermann01ce6012010-03-05 10:03:50 +0000878 WARNING: This will produce a LOT of output and take a long time.
879
880 Note: This option will increase the size of the coreboot image.
881
882 If unsure, say N.
883
884config X86EMU_DEBUG_PNP
885 bool "Log Plug&Play accesses"
886 default n
887 depends on X86EMU_DEBUG
888 help
889 Print Plug And Play accesses made by option ROMs.
890
891 Note: This option will increase the size of the coreboot image.
892
893 If unsure, say N.
894
895config X86EMU_DEBUG_DISK
896 bool "Log Disk I/O"
897 default n
898 depends on X86EMU_DEBUG
899 help
900 Print Disk I/O related messages.
901
902 Note: This option will increase the size of the coreboot image.
903
904 If unsure, say N.
905
906config X86EMU_DEBUG_PMM
907 bool "Log PMM"
908 default n
909 depends on X86EMU_DEBUG
910 help
911 Print messages related to POST Memory Manager (PMM).
912
913 Note: This option will increase the size of the coreboot image.
914
915 If unsure, say N.
916
917
918config X86EMU_DEBUG_VBE
919 bool "Debug VESA BIOS Extensions"
920 default n
921 depends on X86EMU_DEBUG
922 help
923 Print messages related to VESA BIOS Extension (VBE) functions.
924
925 Note: This option will increase the size of the coreboot image.
926
927 If unsure, say N.
928
929config X86EMU_DEBUG_INT10
930 bool "Redirect INT10 output to console"
931 default n
932 depends on X86EMU_DEBUG
933 help
934 Let INT10 (i.e. character output) calls print messages to debug output.
935
936 Note: This option will increase the size of the coreboot image.
937
938 If unsure, say N.
939
940config X86EMU_DEBUG_INTERRUPTS
941 bool "Log intXX calls"
942 default n
943 depends on X86EMU_DEBUG
944 help
945 Print messages related to interrupt handling.
946
947 Note: This option will increase the size of the coreboot image.
948
949 If unsure, say N.
950
951config X86EMU_DEBUG_CHECK_VMEM_ACCESS
952 bool "Log special memory accesses"
953 default n
954 depends on X86EMU_DEBUG
955 help
956 Print messages related to accesses to certain areas of the virtual
957 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
958
959 Note: This option will increase the size of the coreboot image.
960
961 If unsure, say N.
962
963config X86EMU_DEBUG_MEM
964 bool "Log all memory accesses"
965 default n
966 depends on X86EMU_DEBUG
967 help
968 Print memory accesses made by option ROM.
969 Note: This also includes accesses to fetch instructions.
970
971 Note: This option will increase the size of the coreboot image.
972
973 If unsure, say N.
974
975config X86EMU_DEBUG_IO
976 bool "Log IO accesses"
977 default n
978 depends on X86EMU_DEBUG
979 help
980 Print I/O accesses made by option ROM.
981
982 Note: This option will increase the size of the coreboot image.
983
984 If unsure, say N.
985
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +0200986config X86EMU_DEBUG_TIMINGS
987 bool "Output timing information"
988 default n
989 depends on X86EMU_DEBUG && UDELAY_LAPIC && HAVE_MONOTONIC_TIMER
990 help
991 Print timing information needed by i915tool.
992
993 If unsure, say N.
994
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -0700995config DEBUG_SPI_FLASH
996 bool "Output verbose SPI flash debug messages"
997 default n
998 depends on SPI_FLASH
999 help
1000 This option enables additional SPI flash related debug messages.
1001
Stefan Reinauer8e073822012-04-04 00:07:22 +02001002if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
1003# Only visible with the right southbridge and loglevel.
1004config DEBUG_INTEL_ME
1005 bool "Verbose logging for Intel Management Engine"
1006 default n
1007 help
1008 Enable verbose logging for Intel Management Engine driver that
1009 is present on Intel 6-series chipsets.
1010endif
1011
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001012config TRACE
1013 bool "Trace function calls"
1014 default n
1015 help
1016 If enabled, every function will print information to console once
1017 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
1018 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
Ben Gardner8420ad42015-11-18 10:46:53 -06001019 of calling function. Please note some printk related functions
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001020 are omitted from trace to have good looking console dumps.
Stefan Reinauerd37ab452012-12-18 16:23:28 -08001021
1022config DEBUG_COVERAGE
1023 bool "Debug code coverage"
1024 default n
1025 depends on COVERAGE
1026 help
1027 If enabled, the code coverage hooks in coreboot will output some
1028 information about the coverage data that is dumped.
1029
Jonathan Neuschäferfc04f9b2016-06-29 21:59:32 +02001030config DEBUG_BOOT_STATE
1031 bool "Debug boot state machine"
1032 default n
1033 help
1034 Control debugging of the boot state machine. When selected displays
1035 the state boundaries in ramstage.
1036
Nico Hubere84e62542016-10-05 17:43:56 +02001037config DEBUG_ADA_CODE
1038 bool "Compile debug code in Ada sources"
1039 default n
1040 help
1041 Add the compiler switch `-gnata` to compile code guarded by
1042 `pragma Debug`.
1043
Simon Glass46255f72018-07-12 15:26:07 -06001044config HAVE_EM100_SUPPORT
1045 bool "Platform can support the Dediprog EM100 SPI emulator"
1046 help
1047 This is enabled by platforms which can support using the EM100.
1048
1049config EM100
1050 bool "Configure image for EM100 usage"
1051 depends on HAVE_EM100_SUPPORT
1052 help
1053 The Dediprog EM100 SPI emulator allows fast loading of new SPI images
1054 over USB. However it only supports a maximum SPI clock of 20MHz and
1055 single data output. Enable this option to use a 20MHz SPI clock and
1056 disable "Dual Output Fast Read" Support.
1057
1058 On AMD platforms this changes the SPI speed at run-time if the
1059 mainboard code supports this. On supported Intel platforms this works
1060 by changing the settings in the descriptor.bin file.
1061
Uwe Hermann168b11b2009-10-07 16:15:40 +00001062endmenu
1063
Martin Roth8e4aafb2016-12-15 15:25:15 -07001064
1065###############################################################################
1066# Set variables with no prompt - these can be set anywhere, and putting at
1067# the end of this file gives the most flexibility.
Nico Huber3db76532017-05-18 18:07:34 +02001068
1069source "src/lib/Kconfig"
1070
Myles Watsond73c1b52009-10-26 15:14:07 +00001071config ENABLE_APIC_EXT_ID
1072 bool
1073 default n
Myles Watson2e672732009-11-12 16:38:03 +00001074
1075config WARNINGS_ARE_ERRORS
1076 bool
Edward O'Callaghan63f6dc72014-11-18 03:17:54 +11001077 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001078
Peter Stuge51eafde2010-10-13 06:23:02 +00001079# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1080# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1081# mutually exclusive. One of these options must be selected in the
1082# mainboard Kconfig if the chipset supports enabling and disabling of
1083# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1084# in mainboard/Kconfig to know if the button should be enabled or not.
1085
1086config POWER_BUTTON_DEFAULT_ENABLE
1087 def_bool n
1088 help
1089 Select when the board has a power button which can optionally be
1090 disabled by the user.
1091
1092config POWER_BUTTON_DEFAULT_DISABLE
1093 def_bool n
1094 help
1095 Select when the board has a power button which can optionally be
1096 enabled by the user, e.g. when the board ships with a jumper over
1097 the power switch contacts.
1098
1099config POWER_BUTTON_FORCE_ENABLE
1100 def_bool n
1101 help
1102 Select when the board requires that the power button is always
1103 enabled.
1104
1105config POWER_BUTTON_FORCE_DISABLE
1106 def_bool n
1107 help
1108 Select when the board requires that the power button is always
1109 disabled, e.g. when it has been hardwired to ground.
1110
1111config POWER_BUTTON_IS_OPTIONAL
1112 bool
1113 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1114 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1115 help
1116 Internal option that controls ENABLE_POWER_BUTTON visibility.
Duncan Laurie72748002013-10-31 08:26:23 -07001117
1118config REG_SCRIPT
1119 bool
Duncan Laurie72748002013-10-31 08:26:23 -07001120 default n
1121 help
1122 Internal option that controls whether we compile in register scripts.
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001123
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001124config MAX_REBOOT_CNT
1125 int
1126 default 3
Timothy Pearson17ada2e2015-03-18 01:31:34 -05001127 help
1128 Internal option that sets the maximum number of bootblock executions allowed
1129 with the normal image enabled before assuming the normal image is defective
Vadim Bendebury9c9c3362014-07-23 09:40:02 -07001130 and switching to the fallback image.
Martin Roth59ff3402016-02-09 09:06:46 -07001131
Martin Roth8e4aafb2016-12-15 15:25:15 -07001132config UNCOMPRESSED_RAMSTAGE
1133 bool
1134
1135config NO_XIP_EARLY_STAGES
1136 bool
1137 default n if ARCH_X86
1138 default y
1139 help
1140 Identify if early stages are eXecute-In-Place(XIP).
1141
Martin Roth8e4aafb2016-12-15 15:25:15 -07001142config EARLY_CBMEM_LIST
1143 bool
1144 default n
1145 help
1146 Enable display of CBMEM during romstage and postcar.
1147
1148config RELOCATABLE_MODULES
1149 bool
1150 help
1151 If RELOCATABLE_MODULES is selected then support is enabled for
1152 building relocatable modules in the RAM stage. Those modules can be
1153 loaded anywhere and all the relocations are handled automatically.
1154
1155config NO_STAGE_CACHE
1156 bool
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +03001157 default y if !HAVE_ACPI_RESUME || !RELOCATABLE_RAMSTAGE
Martin Roth8e4aafb2016-12-15 15:25:15 -07001158 help
1159 Do not save any component in stage cache for resume path. On resume,
1160 all components would be read back from CBFS again.
1161
1162config GENERIC_GPIO_LIB
1163 bool
1164 help
1165 If enabled, compile the generic GPIO library. A "generic" GPIO
1166 implies configurability usually found on SoCs, particularly the
1167 ability to control internal pull resistors.
1168
Martin Roth8e4aafb2016-12-15 15:25:15 -07001169config BOOTBLOCK_CUSTOM
1170 # To be selected by arch, SoC or mainboard if it does not want use the normal
1171 # src/lib/bootblock.c#main() C entry point.
1172 bool
1173
1174config C_ENVIRONMENT_BOOTBLOCK
1175 # To be selected by arch or platform if a C environment is available during the
1176 # bootblock. Normally this signifies availability of RW memory (e.g. SRAM).
1177 bool
1178
Martin Roth75e5cb72016-12-15 15:05:37 -07001179###############################################################################
1180# Set default values for symbols created before mainboards. This allows the
1181# option to be displayed in the general menu, but the default to be loaded in
1182# the mainboard if desired.
1183config COMPRESS_RAMSTAGE
1184 default y if !UNCOMPRESSED_RAMSTAGE
1185
1186config COMPRESS_PRERAM_STAGES
1187 depends on !ARCH_X86
1188 default y
1189
1190config INCLUDE_CONFIG_FILE
1191 default y
1192
Martin Roth75e5cb72016-12-15 15:05:37 -07001193config BOOTSPLASH_FILE
1194 depends on BOOTSPLASH_IMAGE
1195 default "bootsplash.jpg"
1196
1197config CBFS_SIZE
1198 default ROM_SIZE
Subrata Banikb5962a92019-06-08 12:29:02 +05301199
1200config HAVE_BOOTBLOCK
1201 bool
1202 default y
1203
1204config HAVE_VERSTAGE
1205 bool
1206 depends on VBOOT_SEPARATE_VERSTAGE
1207 default y
1208
1209config HAVE_ROMSTAGE
1210 bool
1211 default y
1212
1213config HAVE_POSTCAR
1214 bool
1215 depends on POSTCAR_STAGE
1216 default y
1217
1218config HAVE_RAMSTAGE
1219 bool
1220 default n if RAMPAYLOAD
1221 default y