blob: 38cf855cc82aa13c9632e9d1091c45eca30b489f [file] [log] [blame]
Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Patrick Georgi0588d192009-08-12 15:00:51 +000016
Uwe Hermannad8c95f2012-04-12 22:00:03 +020017mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000018
Uwe Hermannc04be932009-10-05 13:55:28 +000019menu "General setup"
20
21config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000022 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000023 help
24 Append an extra string to the end of the coreboot version.
25
Uwe Hermann168b11b2009-10-07 16:15:40 +000026 This can be useful if, for instance, you want to append the
27 respective board's hostname or some other identifying string to
28 the coreboot version number, so that you can easily distinguish
29 boot logs of different boards from each other.
30
Patrick Georgi4b8a2412010-02-09 19:35:16 +000031config CBFS_PREFIX
32 string "CBFS prefix to use"
33 default "fallback"
34 help
35 Select the prefix to all files put into the image. It's "fallback"
36 by default, "normal" is a common alternative.
37
Vadim Bendeburyadcb0952014-05-01 12:23:09 -070038config COMMON_CBFS_SPI_WRAPPER
39 bool
40 default n
41 depends on SPI_FLASH
42 depends on !ARCH_X86
43 help
44 Use common wrapper to interface CBFS to SPI bootrom.
45
Vadim Bendebury6bfabce2014-12-25 15:07:22 -080046config MULTIPLE_CBFS_INSTANCES
Martin Roth595e7772015-04-26 18:53:26 -060047 bool "Multiple CBFS instances in the bootrom"
48 default n
Martin Roth595e7772015-04-26 18:53:26 -060049 help
50 Account for the firmware image containing more than one CBFS
51 instance. Locations of instances are known at build time and are
52 communicated between coreboot stages to make sure the next stage is
53 loaded from the appropriate instance.
Vadim Bendebury6bfabce2014-12-25 15:07:22 -080054
Patrick Georgi23d89cc2010-03-16 01:17:19 +000055choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020056 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000057 default COMPILER_GCC
58 help
59 This option allows you to select the compiler used for building
60 coreboot.
61
62config COMPILER_GCC
63 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020064 help
65 Use the GNU Compiler Collection (GCC) to build coreboot.
66
67 For details see http://gcc.gnu.org.
68
Patrick Georgi23d89cc2010-03-16 01:17:19 +000069config COMPILER_LLVM_CLANG
70 bool "LLVM/clang"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020071 help
72 Use LLVM/clang to build coreboot.
73
74 For details see http://clang.llvm.org.
75
Patrick Georgi23d89cc2010-03-16 01:17:19 +000076endchoice
77
Patrick Georgi9b0de712013-12-29 18:45:23 +010078config ANY_TOOLCHAIN
79 bool "Allow building with any toolchain"
80 default n
81 depends on COMPILER_GCC
82 help
83 Many toolchains break when building coreboot since it uses quite
84 unusual linker features. Unless developers explicitely request it,
85 we'll have to assume that they use their distro compiler by mistake.
86 Make sure that using patched compilers is a conscious decision.
87
Patrick Georgi516a2a72010-03-25 21:45:25 +000088config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +020089 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +000090 default n
91 help
92 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020093
94 Requires the ccache utility in your system $PATH.
95
96 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +000097
Sol Boucher69b88bf2015-02-26 11:47:19 -080098config FMD_GENPARSER
99 bool "Generate flashmap descriptor parser using flex and bison"
100 default n
Sol Boucher69b88bf2015-02-26 11:47:19 -0800101 help
102 Enable this option if you are working on the flashmap descriptor
103 parser and made changes to fmd_scanner.l or fmd_parser.y.
104
105 Otherwise, say N to use the provided pregenerated scanner/parser.
106
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000107config SCONFIG_GENPARSER
108 bool "Generate SCONFIG parser using flex and bison"
109 default n
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000110 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200111 Enable this option if you are working on the sconfig device tree
Sol Boucher69b88bf2015-02-26 11:47:19 -0800112 parser and made changes to sconfig.l or sconfig.y.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200113
Sol Boucher69b88bf2015-02-26 11:47:19 -0800114 Otherwise, say N to use the provided pregenerated scanner/parser.
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000115
Joe Korty6d772522010-05-19 18:41:15 +0000116config USE_OPTION_TABLE
117 bool "Use CMOS for configuration values"
118 default n
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000119 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000120 help
121 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200122 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000123
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600124config STATIC_OPTION_TABLE
125 bool "Load default configuration values into CMOS on each boot"
126 default n
127 depends on USE_OPTION_TABLE
128 help
129 Enable this option to reset "CMOS" NVRAM values to default on
130 every boot. Use this if you want the NVRAM configuration to
131 never be modified from its default values.
132
Julius Wernercdf92ea2014-12-09 12:18:00 -0800133config UNCOMPRESSED_RAMSTAGE
134 bool
135 default n
136
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000137config COMPRESS_RAMSTAGE
138 bool "Compress ramstage with LZMA"
Julius Wernercdf92ea2014-12-09 12:18:00 -0800139 default y if !UNCOMPRESSED_RAMSTAGE
140 default n
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000141 help
142 Compress ramstage to save memory in the flash image. Note
143 that decompression might slow down booting if the boot flash
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200144 is connected through a slow link (i.e. SPI).
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000145
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200146config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200147 bool "Include the coreboot .config file into the ROM image"
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200148 default y
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200149 help
150 Include the .config file that was used to compile coreboot
151 in the (CBFS) ROM image. This is useful if you want to know which
152 options were used to build a specific coreboot.rom image.
153
Daniele Forsi53847a22014-07-22 18:00:56 +0200154 Saying Y here will increase the image size by 2-3KB.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200155
156 You can use the following command to easily list the options:
157
158 grep -a CONFIG_ coreboot.rom
159
160 Alternatively, you can also use cbfstool to print the image
161 contents (including the raw 'config' item we're looking for).
162
163 Example:
164
165 $ cbfstool coreboot.rom print
166 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
167 offset 0x0
168 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600169
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200170 Name Offset Type Size
171 cmos_layout.bin 0x0 cmos layout 1159
172 fallback/romstage 0x4c0 stage 339756
Daniele Forsi53847a22014-07-22 18:00:56 +0200173 fallback/ramstage 0x53440 stage 186664
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200174 fallback/payload 0x80dc0 payload 51526
175 config 0x8d740 raw 3324
176 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200177
Kyösti Mälkkif8bf5a12013-10-11 22:08:02 +0300178config EARLY_CBMEM_INIT
Kyösti Mälkki3bf38542014-12-18 22:22:04 +0200179 def_bool !LATE_CBMEM_INIT
180
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700181config COLLECT_TIMESTAMPS
182 bool "Create a table of timestamps collected during boot"
Kyösti Mälkki26447932013-10-11 21:14:59 +0300183 default n
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700184 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200185 Make coreboot create a table of timer-ID/timer-value pairs to
186 allow measuring time spent at different phases of the boot process.
187
Aaron Durbin1936f6c2015-07-03 17:04:21 -0500188config HAS_PRECBMEM_TIMESTAMP_REGION
189 bool "Timestamp region exists for pre-cbmem timestamps"
190 default y if ARCH_ROMSTAGE_X86_32 && CACHE_AS_RAM
Aaron Durbin1936f6c2015-07-03 17:04:21 -0500191 help
192 A separate region is maintained to allow storing of timestamps before
193 cbmem comes up. This is useful for storing timestamps across different
194 stage boundaries.
195
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200196config USE_BLOBS
197 bool "Allow use of binary-only repository"
198 default n
199 help
200 This draws in the blobs repository, which contains binary files that
201 might be required for some chipsets or boards.
202 This flag ensures that a "Free" option remains available for users.
203
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800204config COVERAGE
205 bool "Code coverage support"
206 depends on COMPILER_GCC
207 default n
208 help
209 Add code coverage support for coreboot. This will store code
210 coverage information in CBMEM for extraction from user space.
211 If unsure, say N.
212
Stefan Reinauer58470e32014-10-17 13:08:36 +0200213config RELOCATABLE_MODULES
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200214 bool
Stefan Reinauer58470e32014-10-17 13:08:36 +0200215 default n
216 help
217 If RELOCATABLE_MODULES is selected then support is enabled for
218 building relocatable modules in the RAM stage. Those modules can be
219 loaded anywhere and all the relocations are handled automatically.
220
221config RELOCATABLE_RAMSTAGE
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200222 depends on EARLY_CBMEM_INIT
Stefan Reinauer58470e32014-10-17 13:08:36 +0200223 bool "Build the ramstage to be relocatable in 32-bit address space."
224 default n
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200225 select RELOCATABLE_MODULES
Stefan Reinauer58470e32014-10-17 13:08:36 +0200226 help
227 The reloctable ramstage support allows for the ramstage to be built
228 as a relocatable module. The stage loader can identify a place
229 out of the OS way so that copying memory is unnecessary during an S3
230 wake. When selecting this option the romstage is responsible for
231 determing a stack location to use for loading the ramstage.
232
233config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
234 depends on RELOCATABLE_RAMSTAGE
235 bool "Cache the relocated ramstage outside of cbmem."
236 default n
237 help
238 The relocated ramstage is saved in an area specified by the
239 by the board and/or chipset.
240
Aaron Durbin0424c952015-03-28 23:56:22 -0500241config FLASHMAP_OFFSET
242 hex "Flash Map Offset"
Alexandru Gagniucecf2eb42015-09-28 21:39:12 -0700243 default 0x00670000 if NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC
244 default 0x00610000 if NORTHBRIDGE_INTEL_IVYBRIDGE_MRC
Aaron Durbin0424c952015-03-28 23:56:22 -0500245 default CBFS_SIZE if !ARCH_X86
246 default 0
247 help
248 Offset of flash map in firmware image
249
Julius Werner86fc11d2015-10-09 13:37:58 -0700250# TODO: This doesn't belong here, move to src/arch/x86/Kconfig
Stefan Reinauer58470e32014-10-17 13:08:36 +0200251choice
252 prompt "Bootblock behaviour"
253 default BOOTBLOCK_SIMPLE
254
255config BOOTBLOCK_SIMPLE
256 bool "Always load fallback"
257
258config BOOTBLOCK_NORMAL
259 bool "Switch to normal if CMOS says so"
260
261endchoice
262
Julius Werner86fc11d2015-10-09 13:37:58 -0700263# To be selected by arch, SoC or mainboard if it does not want use the normal
264# src/lib/bootblock.c#main() C entry point.
265config BOOTBLOCK_CUSTOM
266 bool
267 default n
268
Stefan Reinauer58470e32014-10-17 13:08:36 +0200269config BOOTBLOCK_SOURCE
270 string
271 default "bootblock_simple.c" if BOOTBLOCK_SIMPLE
272 default "bootblock_normal.c" if BOOTBLOCK_NORMAL
273
Timothy Pearson44724082015-03-16 11:47:45 -0500274config SKIP_MAX_REBOOT_CNT_CLEAR
275 bool "Do not clear reboot count after successful boot"
276 default n
Timothy Pearson3bfd7cc2015-11-01 02:13:17 -0600277 depends on BOOTBLOCK_NORMAL
Timothy Pearson44724082015-03-16 11:47:45 -0500278 help
279 Do not clear the reboot count immediately after successful boot.
280 Set to allow the payload to control normal/fallback image recovery.
Timothy Pearson3bfd7cc2015-11-01 02:13:17 -0600281 Note that it is the responsibility of the payload to reset the
282 normal boot bit to 1 after each successsful boot.
Timothy Pearson44724082015-03-16 11:47:45 -0500283
Stefan Reinauer58470e32014-10-17 13:08:36 +0200284config UPDATE_IMAGE
285 bool "Update existing coreboot.rom image"
286 default n
287 help
288 If this option is enabled, no new coreboot.rom file
289 is created. Instead it is expected that there already
290 is a suitable file for further processing.
291 The bootblock will not be modified.
292
Stefan Reinauerd06258c2015-03-26 16:29:00 -0700293config GENERIC_GPIO_LIB
294 bool
295 default n
296 help
297 If enabled, compile the generic GPIO library. A "generic" GPIO
298 implies configurability usually found on SoCs, particularly the
299 ability to control internal pull resistors.
300
301config BOARD_ID_AUTO
302 bool
303 default n
304 help
305 Mainboards that can read a board ID from the hardware straps
306 (ie. GPIO) select this configuration option.
307
308config BOARD_ID_MANUAL
Vladimir Serbinenko1e161422015-05-30 22:47:22 +0200309 bool
Stefan Reinauerd06258c2015-03-26 16:29:00 -0700310 default n
311 depends on !BOARD_ID_AUTO
312 help
313 If you want to maintain a board ID, but the hardware does not
314 have straps to automatically determine the ID, you can say Y
315 here and add a file named 'board_id' to CBFS. If you don't know
316 what this is about, say N.
317
318config BOARD_ID_STRING
319 string "Board ID"
320 default "(none)"
321 depends on BOARD_ID_MANUAL
322 help
323 This string is placed in the 'board_id' CBFS file for indicating
324 board type.
325
David Hendricks627b3bd2014-11-03 17:42:09 -0800326config RAM_CODE_SUPPORT
Vladimir Serbinenko8ef9c562015-05-30 22:55:44 +0200327 bool
David Hendricks627b3bd2014-11-03 17:42:09 -0800328 default n
329 help
330 If enabled, coreboot discovers RAM configuration (value obtained by
331 reading board straps) and stores it in coreboot table.
332
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400333config BOOTSPLASH_IMAGE
334 bool "Add a bootsplash image"
335 help
336 Select this option if you have a bootsplash image that you would
337 like to add to your ROM.
338
339 This will only add the image to the ROM. To actually run it check
340 options under 'Display' section.
341
342config BOOTSPLASH_FILE
343 string "Bootsplash path and filename"
344 depends on BOOTSPLASH_IMAGE
345 default "bootsplash.jpg"
346 help
347 The path and filename of the file to use as graphical bootsplash
348 screen. The file format has to be jpg.
349
Uwe Hermannc04be932009-10-05 13:55:28 +0000350endmenu
351
Alexander Couzens77103792015-04-16 02:03:26 +0200352source "src/acpi/Kconfig"
353
Martin Roth026e4dc2015-06-19 23:17:15 -0600354menu "Mainboard"
355
Stefan Reinauera48ca842015-04-04 01:58:28 +0200356source "src/mainboard/Kconfig"
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000357
Martin Roth026e4dc2015-06-19 23:17:15 -0600358config CBFS_SIZE
359 hex "Size of CBFS filesystem in ROM"
Martin Roth59aa2b12015-06-20 16:17:12 -0600360 default 0x100000 if HAVE_INTEL_FIRMWARE || \
Alexandru Gagniucecf2eb42015-09-28 21:39:12 -0700361 NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC || \
362 NORTHBRIDGE_INTEL_IVYBRIDGE_MRC || NORTHBRIDGE_INTEL_IVYBRIDGE || \
363 NORTHBRIDGE_INTEL_SANDYBRIDGE || \
Martin Rothc407cb92015-06-23 19:59:30 -0600364 NORTHBRIDGE_INTEL_NEHALEM || SOC_INTEL_BRASWELL || \
Martin Roth026e4dc2015-06-19 23:17:15 -0600365 SOC_INTEL_BROADWELL
Aaron Durbin2ca127402015-07-30 13:34:29 -0500366 default 0x200000 if SOC_INTEL_SKYLAKE
Martin Roth026e4dc2015-06-19 23:17:15 -0600367 default ROM_SIZE
368 help
369 This is the part of the ROM actually managed by CBFS, located at the
370 end of the ROM (passed through cbfstool -o) on x86 and at at the start
371 of the ROM (passed through cbfstool -s) everywhere else. It defaults
372 to span the whole ROM on all but Intel systems that use an Intel Firmware
373 Descriptor. It can be overridden to make coreboot live alongside other
374 components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
375 binaries.
376
377endmenu
378
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200379config FMDFILE
380 string "fmap description file in fmd format"
381 default ""
382 help
383 The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
384 but in some cases more complex setups are required.
385 When an fmd is specified, it overrides the default format.
386
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200387config SYSTEM_TYPE_LAPTOP
Martin Roth595e7772015-04-26 18:53:26 -0600388 default n
389 bool
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200390
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000391menu "Chipset"
392
Duncan Lauried2119762015-06-08 18:11:56 -0700393comment "SoC"
394source "src/soc/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000395comment "CPU"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200396source "src/cpu/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000397comment "Northbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200398source "src/northbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000399comment "Southbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200400source "src/southbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000401comment "Super I/O"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200402source "src/superio/*/Kconfig"
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000403comment "Embedded Controllers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200404source "src/ec/acpi/Kconfig"
405source "src/ec/*/*/Kconfig"
Marc Jones78687972015-04-22 23:16:31 -0600406source "src/drivers/intel/fsp1_0/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000407
Martin Roth59aa2b12015-06-20 16:17:12 -0600408source "src/southbridge/intel/common/firmware/Kconfig"
Martin Rothe1523ec2015-06-19 22:30:43 -0600409source "src/vendorcode/*/Kconfig"
Martin Roth59aa2b12015-06-20 16:17:12 -0600410
Martin Rothe1523ec2015-06-19 22:30:43 -0600411source "src/arch/*/Kconfig"
412
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000413endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000414
Stefan Reinauera48ca842015-04-04 01:58:28 +0200415source "src/device/Kconfig"
Stefan Reinauer95a63962012-11-13 17:00:01 -0800416
Rudolf Marekd9c25492010-05-16 15:31:53 +0000417menu "Generic Drivers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200418source "src/drivers/*/Kconfig"
Rudolf Marekd9c25492010-05-16 15:31:53 +0000419endmenu
420
Patrick Georgi0770f252015-04-22 13:28:21 +0200421config RTC
422 bool
423 default n
424
Stefan Reinauer7cb01e02013-08-29 16:05:02 -0700425config TPM
426 bool
427 default n
428 select LPC_TPM if ARCH_X86
Gabe Black51edd542013-09-30 23:00:33 -0700429 select I2C_TPM if ARCH_ARM
Furquan Shaikh2af76f42014-04-28 16:39:40 -0700430 select I2C_TPM if ARCH_ARM64
Stefan Reinauer7cb01e02013-08-29 16:05:02 -0700431 help
432 Enable this option to enable TPM support in coreboot.
433
434 If unsure, say N.
435
Kyösti Mälkkieaee6e22014-04-30 01:35:29 +0300436config RAMTOP
437 hex
438 default 0x200000
439 depends on ARCH_X86
440
Patrick Georgi0588d192009-08-12 15:00:51 +0000441config HEAP_SIZE
442 hex
Myles Watson04000f42009-10-16 19:12:49 +0000443 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000444
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700445config STACK_SIZE
446 hex
Julius Werner66a476a2015-10-12 16:45:21 -0700447 default 0x1000 if ARCH_X86
448 default 0x0
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700449
Patrick Georgi0588d192009-08-12 15:00:51 +0000450config MAX_CPUS
451 int
452 default 1
453
454config MMCONF_SUPPORT_DEFAULT
455 bool
456 default n
457
458config MMCONF_SUPPORT
459 bool
460 default n
461
Kyösti Mälkki5687fc92013-11-28 18:11:49 +0200462config BOOTMODE_STRAPS
463 bool
464 default n
465
Stefan Reinauera48ca842015-04-04 01:58:28 +0200466source "src/console/Kconfig"
Patrick Georgi0588d192009-08-12 15:00:51 +0000467
468config HAVE_ACPI_RESUME
469 bool
470 default n
471
Patrick Georgi0588d192009-08-12 15:00:51 +0000472config HAVE_HARD_RESET
473 bool
Uwe Hermann748475b2009-10-09 11:47:21 +0000474 default n
Patrick Georgi37bdb872010-02-27 08:39:04 +0000475 help
476 This variable specifies whether a given board has a hard_reset
477 function, no matter if it's provided by board code or chipset code.
478
Timothy Pearson44d53422015-05-18 16:04:10 -0500479config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
480 bool
481 default n
482
Timothy Pearson7b22d842015-08-28 19:52:05 -0500483config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
484 bool
485 default n
486 help
487 This should be enabled on certain plaforms, such as the AMD
488 SR565x, that cannot handle concurrent CBFS accesses from
489 multiple APs during early startup.
490
Aaron Durbina4217912013-04-29 22:31:51 -0500491config HAVE_MONOTONIC_TIMER
492 def_bool n
493 help
494 The board/chipset provides a monotonic timer.
495
Aaron Durbine5e36302014-09-25 10:05:15 -0500496config GENERIC_UDELAY
497 def_bool n
498 depends on HAVE_MONOTONIC_TIMER
499 help
500 The board/chipset uses a generic udelay function utilizing the
501 monotonic timer.
502
Aaron Durbin340ca912013-04-30 09:58:12 -0500503config TIMER_QUEUE
504 def_bool n
505 depends on HAVE_MONOTONIC_TIMER
506 help
Kyösti Mälkkiecd84242013-09-13 07:57:49 +0300507 Provide a timer queue for performing time-based callbacks.
Aaron Durbin340ca912013-04-30 09:58:12 -0500508
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500509config COOP_MULTITASKING
510 def_bool n
Aaron Durbin38c326d2013-05-06 12:22:23 -0500511 depends on TIMER_QUEUE && ARCH_X86
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500512 help
513 Cooperative multitasking allows callbacks to be multiplexed on the
514 main thread of ramstage. With this enabled it allows for multiple
515 execution paths to take place when they have udelay() calls within
516 their code.
517
518config NUM_THREADS
519 int
520 default 4
521 depends on COOP_MULTITASKING
522 help
523 How many execution threads to cooperatively multitask with.
524
Patrick Georgi0588d192009-08-12 15:00:51 +0000525config HAVE_OPTION_TABLE
526 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000527 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000528 help
529 This variable specifies whether a given board has a cmos.layout
530 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000531 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000532
Patrick Georgi0588d192009-08-12 15:00:51 +0000533config PIRQ_ROUTE
534 bool
535 default n
536
537config HAVE_SMI_HANDLER
538 bool
539 default n
540
541config PCI_IO_CFG_EXT
542 bool
543 default n
544
545config IOAPIC
546 bool
547 default n
548
Kyösti Mälkki107f72e2014-01-06 11:06:26 +0200549config CACHE_ROM_SIZE_OVERRIDE
Stefan Reinauer5b635792012-08-16 14:05:42 -0700550 hex
Kyösti Mälkki107f72e2014-01-06 11:06:26 +0200551 default 0
Stefan Reinauer5b635792012-08-16 14:05:42 -0700552
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000553# TODO: Can probably be removed once all chipsets have kconfig options for it.
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000554config VIDEO_MB
555 int
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000556 default 0
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000557
Myles Watson45bb25f2009-09-22 18:49:08 +0000558config USE_WATCHDOG_ON_BOOT
559 bool
560 default n
561
562config VGA
563 bool
564 default n
565 help
566 Build board-specific VGA code.
567
568config GFXUMA
569 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000570 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000571 help
572 Enable Unified Memory Architecture for graphics.
573
Myles Watsonb8e20272009-10-15 13:35:47 +0000574config HAVE_ACPI_TABLES
575 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000576 help
577 This variable specifies whether a given board has ACPI table support.
578 It is usually set in mainboard/*/Kconfig.
Myles Watsonb8e20272009-10-15 13:35:47 +0000579
580config HAVE_MP_TABLE
581 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000582 help
583 This variable specifies whether a given board has MP table support.
584 It is usually set in mainboard/*/Kconfig.
585 Whether or not the MP table is actually generated by coreboot
586 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000587
588config HAVE_PIRQ_TABLE
589 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000590 help
591 This variable specifies whether a given board has PIRQ table support.
592 It is usually set in mainboard/*/Kconfig.
593 Whether or not the PIRQ table is actually generated by coreboot
594 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000595
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -0500596config MAX_PIRQ_LINKS
597 int
598 default 4
599 help
600 This variable specifies the number of PIRQ interrupt links which are
601 routable. On most chipsets, this is 4, INTA through INTD. Some
602 chipsets offer more than four links, commonly up to INTH. They may
603 also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
604 table specifies links greater than 4, pirq_route_irqs will not
605 function properly, unless this variable is correctly set.
606
Vladimir Serbinenkoc21e0732014-10-16 12:48:19 +0200607config COMMON_FADT
608 bool
609 default n
610
Myles Watsond73c1b52009-10-26 15:14:07 +0000611#These Options are here to avoid "undefined" warnings.
612#The actual selection and help texts are in the following menu.
613
Uwe Hermann168b11b2009-10-07 16:15:40 +0000614menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000615
Myles Watsonb8e20272009-10-15 13:35:47 +0000616config GENERATE_MP_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800617 prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
618 bool
619 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000620 help
621 Generate an MP table (conforming to the Intel MultiProcessor
622 specification 1.4) for this board.
623
624 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000625
Myles Watsonb8e20272009-10-15 13:35:47 +0000626config GENERATE_PIRQ_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800627 prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE
628 bool
629 default HAVE_PIRQ_TABLE
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000630 help
631 Generate a PIRQ table for this board.
632
633 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000634
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200635config GENERATE_SMBIOS_TABLES
636 depends on ARCH_X86
637 bool "Generate SMBIOS tables"
638 default y
639 help
640 Generate SMBIOS tables for this board.
641
642 If unsure, say Y.
643
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200644config SMBIOS_PROVIDED_BY_MOBO
645 bool
646 default n
647
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200648config MAINBOARD_SERIAL_NUMBER
649 string "SMBIOS Serial Number"
650 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200651 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200652 default "123456789"
Martin Roth595e7772015-04-26 18:53:26 -0600653 help
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200654 The Serial Number to store in SMBIOS structures.
655
656config MAINBOARD_VERSION
657 string "SMBIOS Version Number"
658 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200659 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200660 default "1.0"
661 help
662 The Version Number to store in SMBIOS structures.
663
664config MAINBOARD_SMBIOS_MANUFACTURER
665 string "SMBIOS Manufacturer"
666 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200667 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200668 default MAINBOARD_VENDOR
669 help
670 Override the default Manufacturer stored in SMBIOS structures.
671
672config MAINBOARD_SMBIOS_PRODUCT_NAME
673 string "SMBIOS Product name"
674 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200675 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200676 default MAINBOARD_PART_NUMBER
677 help
678 Override the default Product name stored in SMBIOS structures.
679
Myles Watson45bb25f2009-09-22 18:49:08 +0000680endmenu
681
Patrick Georgi0588d192009-08-12 15:00:51 +0000682menu "Payload"
683
Patrick Georgi0588d192009-08-12 15:00:51 +0000684choice
Uwe Hermann168b11b2009-10-07 16:15:40 +0000685 prompt "Add a payload"
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000686 default PAYLOAD_NONE if !ARCH_X86
687 default PAYLOAD_SEABIOS if ARCH_X86
Patrick Georgi0588d192009-08-12 15:00:51 +0000688
Uwe Hermann168b11b2009-10-07 16:15:40 +0000689config PAYLOAD_NONE
690 bool "None"
691 help
692 Select this option if you want to create an "empty" coreboot
693 ROM image for a certain mainboard, i.e. a coreboot ROM image
694 which does not yet contain a payload.
695
696 For such an image to be useful, you have to use 'cbfstool'
697 to add a payload to the ROM image later.
698
Patrick Georgi0588d192009-08-12 15:00:51 +0000699config PAYLOAD_ELF
Uwe Hermann168b11b2009-10-07 16:15:40 +0000700 bool "An ELF executable payload"
Patrick Georgi0588d192009-08-12 15:00:51 +0000701 help
702 Select this option if you have a payload image (an ELF file)
703 which coreboot should run as soon as the basic hardware
704 initialization is completed.
705
706 You will be able to specify the location and file name of the
707 payload image later.
Patrick Georgi0588d192009-08-12 15:00:51 +0000708
Stefan Reinauer1a8b7bf2015-06-30 15:58:56 -0700709source "payloads/external/*/Kconfig.name"
Stefan Reinauercc5b3442013-01-15 17:02:58 -0800710
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000711endchoice
712
Stefan Reinauer1a8b7bf2015-06-30 15:58:56 -0700713source "payloads/external/*/Kconfig"
Stefan Reinauere50952f2011-04-15 03:34:05 +0000714
Stefan Reinauerbccbbe62010-12-19 21:20:14 +0000715config PAYLOAD_FILE
Cristi Magherusanb5034d42009-08-17 14:47:32 +0000716 string "Payload path and filename"
Patrick Georgi0588d192009-08-12 15:00:51 +0000717 depends on PAYLOAD_ELF
718 default "payload.elf"
719 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000720 The path and filename of the ELF executable file to use as payload.
Patrick Georgi0588d192009-08-12 15:00:51 +0000721
Uwe Hermann168b11b2009-10-07 16:15:40 +0000722# TODO: Defined if no payload? Breaks build?
723config COMPRESSED_PAYLOAD_LZMA
724 bool "Use LZMA compression for payloads"
725 default y
Stefan Reinauer1a8b7bf2015-06-30 15:58:56 -0700726 depends on !PAYLOAD_NONE && !PAYLOAD_LINUX
Uwe Hermann168b11b2009-10-07 16:15:40 +0000727 help
728 In order to reduce the size payloads take up in the ROM chip
729 coreboot can compress them using the LZMA algorithm.
730
Peter Stugea758ca22009-09-17 16:21:31 +0000731endmenu
732
Uwe Hermann168b11b2009-10-07 16:15:40 +0000733menu "Debugging"
734
735# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000736config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000737 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200738 default n
Denis 'GNUtoo' Carikli3747ba12015-12-10 22:04:56 +0100739 depends on CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +0000740 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000741 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000742 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000743
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200744config GDB_WAIT
745 bool "Wait for a GDB connection"
746 default n
747 depends on GDB_STUB
748 help
749 If enabled, coreboot will wait for a GDB connection.
750
Julius Wernerd82e0cf2015-02-17 17:27:23 -0800751config FATAL_ASSERTS
752 bool "Halt when hitting a BUG() or assertion error"
753 default n
754 help
755 If enabled, coreboot will call hlt() on a BUG() or failed ASSERT().
756
Stefan Reinauerfe422182012-05-02 16:33:18 -0700757config DEBUG_CBFS
758 bool "Output verbose CBFS debug messages"
759 default n
Stefan Reinauerfe422182012-05-02 16:33:18 -0700760 help
761 This option enables additional CBFS related debug messages.
762
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000763config HAVE_DEBUG_RAM_SETUP
764 def_bool n
765
Uwe Hermann01ce6012010-03-05 10:03:50 +0000766config DEBUG_RAM_SETUP
767 bool "Output verbose RAM init debug messages"
768 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000769 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000770 help
771 This option enables additional RAM init related debug messages.
772 It is recommended to enable this when debugging issues on your
773 board which might be RAM init related.
774
775 Note: This option will increase the size of the coreboot image.
776
777 If unsure, say N.
778
Patrick Georgie82618d2010-10-01 14:50:12 +0000779config HAVE_DEBUG_CAR
780 def_bool n
781
Peter Stuge5015f792010-11-10 02:00:32 +0000782config DEBUG_CAR
783 def_bool n
784 depends on HAVE_DEBUG_CAR
785
786if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermanna953f372010-11-10 00:14:32 +0000787# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
788# printk(BIOS_DEBUG, ...) calls.
Patrick Georgie82618d2010-10-01 14:50:12 +0000789config DEBUG_CAR
790 bool "Output verbose Cache-as-RAM debug messages"
791 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000792 depends on HAVE_DEBUG_CAR
Patrick Georgie82618d2010-10-01 14:50:12 +0000793 help
794 This option enables additional CAR related debug messages.
Peter Stuge5015f792010-11-10 02:00:32 +0000795endif
Patrick Georgie82618d2010-10-01 14:50:12 +0000796
Myles Watson80e914ff2010-06-01 19:25:31 +0000797config DEBUG_PIRQ
798 bool "Check PIRQ table consistency"
799 default n
800 depends on GENERATE_PIRQ_TABLE
801 help
802 If unsure, say N.
803
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000804config HAVE_DEBUG_SMBUS
805 def_bool n
806
Uwe Hermann01ce6012010-03-05 10:03:50 +0000807config DEBUG_SMBUS
808 bool "Output verbose SMBus debug messages"
809 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000810 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000811 help
812 This option enables additional SMBus (and SPD) debug messages.
813
814 Note: This option will increase the size of the coreboot image.
815
816 If unsure, say N.
817
818config DEBUG_SMI
819 bool "Output verbose SMI debug messages"
820 default n
821 depends on HAVE_SMI_HANDLER
Martin Roth3a543182015-09-28 15:27:24 -0600822 select SPI_FLASH_SMM if SPI_CONSOLE
Uwe Hermann01ce6012010-03-05 10:03:50 +0000823 help
824 This option enables additional SMI related debug messages.
825
826 Note: This option will increase the size of the coreboot image.
827
828 If unsure, say N.
829
Stefan Reinauerbc0f7a62010-08-01 15:41:14 +0000830config DEBUG_SMM_RELOCATION
831 bool "Debug SMM relocation code"
832 default n
833 depends on HAVE_SMI_HANDLER
834 help
835 This option enables additional SMM handler relocation related
836 debug messages.
837
838 Note: This option will increase the size of the coreboot image.
839
840 If unsure, say N.
841
Uwe Hermanna953f372010-11-10 00:14:32 +0000842# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
843# printk(BIOS_DEBUG, ...) calls.
844config DEBUG_MALLOC
Stefan Reinauer95a63962012-11-13 17:00:01 -0800845 prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
846 bool
Uwe Hermanna953f372010-11-10 00:14:32 +0000847 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000848 help
849 This option enables additional malloc related debug messages.
850
851 Note: This option will increase the size of the coreboot image.
852
853 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300854
855# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
856# printk(BIOS_DEBUG, ...) calls.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300857config DEBUG_ACPI
Stefan Reinauer95a63962012-11-13 17:00:01 -0800858 prompt "Output verbose ACPI debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
859 bool
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300860 default n
861 help
862 This option enables additional ACPI related debug messages.
863
864 Note: This option will slightly increase the size of the coreboot image.
865
866 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300867
Uwe Hermanna953f372010-11-10 00:14:32 +0000868# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
869# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000870config REALMODE_DEBUG
Stefan Reinauer95a63962012-11-13 17:00:01 -0800871 prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
872 bool
Myles Watson6c9bc012010-09-07 22:30:15 +0000873 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000874 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000875 help
876 This option enables additional x86emu related debug messages.
877
878 Note: This option will increase the time to emulate a ROM.
879
880 If unsure, say N.
881
Uwe Hermann01ce6012010-03-05 10:03:50 +0000882config X86EMU_DEBUG
883 bool "Output verbose x86emu debug messages"
884 default n
885 depends on PCI_OPTION_ROM_RUN_YABEL
886 help
887 This option enables additional x86emu related debug messages.
888
889 Note: This option will increase the size of the coreboot image.
890
891 If unsure, say N.
892
893config X86EMU_DEBUG_JMP
894 bool "Trace JMP/RETF"
895 default n
896 depends on X86EMU_DEBUG
897 help
898 Print information about JMP and RETF opcodes from x86emu.
899
900 Note: This option will increase the size of the coreboot image.
901
902 If unsure, say N.
903
904config X86EMU_DEBUG_TRACE
905 bool "Trace all opcodes"
906 default n
907 depends on X86EMU_DEBUG
908 help
909 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000910
Uwe Hermann01ce6012010-03-05 10:03:50 +0000911 WARNING: This will produce a LOT of output and take a long time.
912
913 Note: This option will increase the size of the coreboot image.
914
915 If unsure, say N.
916
917config X86EMU_DEBUG_PNP
918 bool "Log Plug&Play accesses"
919 default n
920 depends on X86EMU_DEBUG
921 help
922 Print Plug And Play accesses made by option ROMs.
923
924 Note: This option will increase the size of the coreboot image.
925
926 If unsure, say N.
927
928config X86EMU_DEBUG_DISK
929 bool "Log Disk I/O"
930 default n
931 depends on X86EMU_DEBUG
932 help
933 Print Disk I/O related messages.
934
935 Note: This option will increase the size of the coreboot image.
936
937 If unsure, say N.
938
939config X86EMU_DEBUG_PMM
940 bool "Log PMM"
941 default n
942 depends on X86EMU_DEBUG
943 help
944 Print messages related to POST Memory Manager (PMM).
945
946 Note: This option will increase the size of the coreboot image.
947
948 If unsure, say N.
949
950
951config X86EMU_DEBUG_VBE
952 bool "Debug VESA BIOS Extensions"
953 default n
954 depends on X86EMU_DEBUG
955 help
956 Print messages related to VESA BIOS Extension (VBE) functions.
957
958 Note: This option will increase the size of the coreboot image.
959
960 If unsure, say N.
961
962config X86EMU_DEBUG_INT10
963 bool "Redirect INT10 output to console"
964 default n
965 depends on X86EMU_DEBUG
966 help
967 Let INT10 (i.e. character output) calls print messages to debug output.
968
969 Note: This option will increase the size of the coreboot image.
970
971 If unsure, say N.
972
973config X86EMU_DEBUG_INTERRUPTS
974 bool "Log intXX calls"
975 default n
976 depends on X86EMU_DEBUG
977 help
978 Print messages related to interrupt handling.
979
980 Note: This option will increase the size of the coreboot image.
981
982 If unsure, say N.
983
984config X86EMU_DEBUG_CHECK_VMEM_ACCESS
985 bool "Log special memory accesses"
986 default n
987 depends on X86EMU_DEBUG
988 help
989 Print messages related to accesses to certain areas of the virtual
990 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
991
992 Note: This option will increase the size of the coreboot image.
993
994 If unsure, say N.
995
996config X86EMU_DEBUG_MEM
997 bool "Log all memory accesses"
998 default n
999 depends on X86EMU_DEBUG
1000 help
1001 Print memory accesses made by option ROM.
1002 Note: This also includes accesses to fetch instructions.
1003
1004 Note: This option will increase the size of the coreboot image.
1005
1006 If unsure, say N.
1007
1008config X86EMU_DEBUG_IO
1009 bool "Log IO accesses"
1010 default n
1011 depends on X86EMU_DEBUG
1012 help
1013 Print I/O accesses made by option ROM.
1014
1015 Note: This option will increase the size of the coreboot image.
1016
1017 If unsure, say N.
1018
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +02001019config X86EMU_DEBUG_TIMINGS
1020 bool "Output timing information"
1021 default n
1022 depends on X86EMU_DEBUG && UDELAY_LAPIC && HAVE_MONOTONIC_TIMER
1023 help
1024 Print timing information needed by i915tool.
1025
1026 If unsure, say N.
1027
Stefan Reinauerdfb098d2011-11-17 12:50:54 -08001028config DEBUG_TPM
1029 bool "Output verbose TPM debug messages"
1030 default n
1031 depends on TPM
1032 help
1033 This option enables additional TPM related debug messages.
1034
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -07001035config DEBUG_SPI_FLASH
1036 bool "Output verbose SPI flash debug messages"
1037 default n
1038 depends on SPI_FLASH
1039 help
1040 This option enables additional SPI flash related debug messages.
1041
Kyösti Mälkki3be80cc2013-06-06 10:46:37 +03001042config DEBUG_USBDEBUG
1043 bool "Output verbose USB 2.0 EHCI debug dongle messages"
1044 default n
1045 depends on USBDEBUG
1046 help
1047 This option enables additional USB 2.0 debug dongle related messages.
1048
1049 Select this to debug the connection of usbdebug dongle. Note that
1050 you need some other working console to receive the messages.
1051
Stefan Reinauer8e073822012-04-04 00:07:22 +02001052if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
1053# Only visible with the right southbridge and loglevel.
1054config DEBUG_INTEL_ME
1055 bool "Verbose logging for Intel Management Engine"
1056 default n
1057 help
1058 Enable verbose logging for Intel Management Engine driver that
1059 is present on Intel 6-series chipsets.
1060endif
1061
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001062config TRACE
1063 bool "Trace function calls"
1064 default n
1065 help
1066 If enabled, every function will print information to console once
1067 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
1068 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
Ben Gardner8420ad42015-11-18 10:46:53 -06001069 of calling function. Please note some printk related functions
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001070 are omitted from trace to have good looking console dumps.
Stefan Reinauerd37ab452012-12-18 16:23:28 -08001071
1072config DEBUG_COVERAGE
1073 bool "Debug code coverage"
1074 default n
1075 depends on COVERAGE
1076 help
1077 If enabled, the code coverage hooks in coreboot will output some
1078 information about the coverage data that is dumped.
1079
Uwe Hermann168b11b2009-10-07 16:15:40 +00001080endmenu
1081
Myles Watsond73c1b52009-10-26 15:14:07 +00001082# These probably belong somewhere else, but they are needed somewhere.
Myles Watsond73c1b52009-10-26 15:14:07 +00001083config ENABLE_APIC_EXT_ID
1084 bool
1085 default n
Myles Watson2e672732009-11-12 16:38:03 +00001086
1087config WARNINGS_ARE_ERRORS
1088 bool
Edward O'Callaghan63f6dc72014-11-18 03:17:54 +11001089 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001090
Martin Roth77c67b32015-06-25 09:36:27 -06001091# TODO: Remove this when all platforms are fixed.
1092config IASL_WARNINGS_ARE_ERRORS
1093 def_bool y
1094 help
1095 Select to Fail the build if a IASL generates a warning.
1096 This will be defaulted to disabled for the platforms that
1097 currently fail. This allows the REST of the platforms to
1098 have this check enabled while we're working to get those
1099 boards fixed.
1100
1101 DO NOT ADD TO ANY ADDITIONAL PLATFORMS INSTEAD OF FIXING
1102 THE ASL.
1103
Peter Stuge51eafde2010-10-13 06:23:02 +00001104# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1105# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1106# mutually exclusive. One of these options must be selected in the
1107# mainboard Kconfig if the chipset supports enabling and disabling of
1108# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1109# in mainboard/Kconfig to know if the button should be enabled or not.
1110
1111config POWER_BUTTON_DEFAULT_ENABLE
1112 def_bool n
1113 help
1114 Select when the board has a power button which can optionally be
1115 disabled by the user.
1116
1117config POWER_BUTTON_DEFAULT_DISABLE
1118 def_bool n
1119 help
1120 Select when the board has a power button which can optionally be
1121 enabled by the user, e.g. when the board ships with a jumper over
1122 the power switch contacts.
1123
1124config POWER_BUTTON_FORCE_ENABLE
1125 def_bool n
1126 help
1127 Select when the board requires that the power button is always
1128 enabled.
1129
1130config POWER_BUTTON_FORCE_DISABLE
1131 def_bool n
1132 help
1133 Select when the board requires that the power button is always
1134 disabled, e.g. when it has been hardwired to ground.
1135
1136config POWER_BUTTON_IS_OPTIONAL
1137 bool
1138 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1139 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1140 help
1141 Internal option that controls ENABLE_POWER_BUTTON visibility.
Duncan Laurie72748002013-10-31 08:26:23 -07001142
1143config REG_SCRIPT
1144 bool
Duncan Laurie72748002013-10-31 08:26:23 -07001145 default n
1146 help
1147 Internal option that controls whether we compile in register scripts.
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001148
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001149config MAX_REBOOT_CNT
1150 int
1151 default 3
Timothy Pearson17ada2e2015-03-18 01:31:34 -05001152 help
1153 Internal option that sets the maximum number of bootblock executions allowed
1154 with the normal image enabled before assuming the normal image is defective
Vadim Bendebury9c9c3362014-07-23 09:40:02 -07001155 and switching to the fallback image.