Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 16 | #include <arch/io.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 17 | #include <device/pci_ops.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 18 | #include <cbmem.h> |
| 19 | #include <console/console.h> |
| 20 | #include <device/device.h> |
| 21 | #include <device/pci.h> |
| 22 | #include <device/pci_def.h> |
| 23 | #include <reg_script.h> |
| 24 | #include <stdint.h> |
| 25 | #include <stdlib.h> |
| 26 | #include <string.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 27 | #include <soc/iomap.h> |
| 28 | #include <soc/lpc.h> |
| 29 | #include <soc/pci_devs.h> |
| 30 | #include <soc/pm.h> |
| 31 | #include <soc/romstage.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 32 | |
Arthur Heymans | 7ea4e02 | 2018-12-29 14:20:00 +0100 | [diff] [blame] | 33 | static struct chipset_power_state power_state; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 34 | |
Aaron Durbin | 41607a4 | 2015-06-09 13:54:10 -0500 | [diff] [blame] | 35 | static void migrate_power_state(int is_recovery) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 36 | { |
| 37 | struct chipset_power_state *ps_cbmem; |
| 38 | struct chipset_power_state *ps_car; |
| 39 | |
Arthur Heymans | 7ea4e02 | 2018-12-29 14:20:00 +0100 | [diff] [blame] | 40 | ps_car = &power_state; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 41 | ps_cbmem = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*ps_cbmem)); |
| 42 | |
| 43 | if (ps_cbmem == NULL) { |
| 44 | printk(BIOS_DEBUG, "Not adding power state to cbmem!\n"); |
| 45 | return; |
| 46 | } |
| 47 | memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem)); |
| 48 | } |
Kyösti Mälkki | 4fbac46 | 2015-01-07 04:48:43 +0200 | [diff] [blame] | 49 | ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 50 | |
| 51 | /* Return 0, 3, or 5 to indicate the previous sleep state. */ |
| 52 | static int prev_sleep_state(struct chipset_power_state *ps) |
| 53 | { |
| 54 | /* Default to S0. */ |
Aaron Durbin | 9e6d143 | 2016-07-13 23:21:41 -0500 | [diff] [blame] | 55 | int prev_sleep_state = ACPI_S0; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 56 | |
| 57 | if (ps->pm1_sts & WAK_STS) { |
Aaron Durbin | 9e6d143 | 2016-07-13 23:21:41 -0500 | [diff] [blame] | 58 | switch (acpi_sleep_from_pm1(ps->pm1_cnt)) { |
| 59 | case ACPI_S3: |
| 60 | if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) |
| 61 | prev_sleep_state = ACPI_S3; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 62 | break; |
Aaron Durbin | 9e6d143 | 2016-07-13 23:21:41 -0500 | [diff] [blame] | 63 | case ACPI_S5: |
| 64 | prev_sleep_state = ACPI_S5; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 65 | break; |
| 66 | } |
| 67 | /* Clear SLP_TYP. */ |
| 68 | outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT); |
| 69 | } |
| 70 | |
| 71 | if (ps->gen_pmcon3 & (PWR_FLR | SUS_PWR_FLR)) |
Aaron Durbin | 9e6d143 | 2016-07-13 23:21:41 -0500 | [diff] [blame] | 72 | prev_sleep_state = ACPI_S5; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 73 | |
| 74 | return prev_sleep_state; |
| 75 | } |
| 76 | |
| 77 | static void dump_power_state(struct chipset_power_state *ps) |
| 78 | { |
| 79 | printk(BIOS_DEBUG, "PM1_STS: %04x\n", ps->pm1_sts); |
| 80 | printk(BIOS_DEBUG, "PM1_EN: %04x\n", ps->pm1_en); |
| 81 | printk(BIOS_DEBUG, "PM1_CNT: %08x\n", ps->pm1_cnt); |
Duncan Laurie | 047f03a | 2014-08-11 09:54:19 -0700 | [diff] [blame] | 82 | printk(BIOS_DEBUG, "TCO_STS: %04x %04x\n", |
| 83 | ps->tco1_sts, ps->tco2_sts); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 84 | |
| 85 | printk(BIOS_DEBUG, "GPE0_STS: %08x %08x %08x %08x\n", |
| 86 | ps->gpe0_sts[0], ps->gpe0_sts[1], |
| 87 | ps->gpe0_sts[2], ps->gpe0_sts[3]); |
| 88 | printk(BIOS_DEBUG, "GPE0_EN: %08x %08x %08x %08x\n", |
| 89 | ps->gpe0_en[0], ps->gpe0_en[1], |
| 90 | ps->gpe0_en[2], ps->gpe0_en[3]); |
| 91 | |
| 92 | printk(BIOS_DEBUG, "GEN_PMCON: %04x %04x %04x\n", |
| 93 | ps->gen_pmcon1, ps->gen_pmcon2, ps->gen_pmcon3); |
| 94 | |
| 95 | printk(BIOS_DEBUG, "Previous Sleep State: S%d\n", |
| 96 | ps->prev_sleep_state); |
| 97 | } |
| 98 | |
| 99 | /* Fill power state structure from ACPI PM registers */ |
| 100 | struct chipset_power_state *fill_power_state(void) |
| 101 | { |
Arthur Heymans | 7ea4e02 | 2018-12-29 14:20:00 +0100 | [diff] [blame] | 102 | struct chipset_power_state *ps = &power_state; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 103 | |
| 104 | ps->pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS); |
| 105 | ps->pm1_en = inw(ACPI_BASE_ADDRESS + PM1_EN); |
| 106 | ps->pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); |
Duncan Laurie | 047f03a | 2014-08-11 09:54:19 -0700 | [diff] [blame] | 107 | ps->tco1_sts = inw(ACPI_BASE_ADDRESS + TCO1_STS); |
| 108 | ps->tco2_sts = inw(ACPI_BASE_ADDRESS + TCO2_STS); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 109 | ps->gpe0_sts[0] = inl(ACPI_BASE_ADDRESS + GPE0_STS(0)); |
| 110 | ps->gpe0_sts[1] = inl(ACPI_BASE_ADDRESS + GPE0_STS(1)); |
| 111 | ps->gpe0_sts[2] = inl(ACPI_BASE_ADDRESS + GPE0_STS(2)); |
| 112 | ps->gpe0_sts[3] = inl(ACPI_BASE_ADDRESS + GPE0_STS(3)); |
| 113 | ps->gpe0_en[0] = inl(ACPI_BASE_ADDRESS + GPE0_EN(0)); |
| 114 | ps->gpe0_en[1] = inl(ACPI_BASE_ADDRESS + GPE0_EN(1)); |
| 115 | ps->gpe0_en[2] = inl(ACPI_BASE_ADDRESS + GPE0_EN(2)); |
| 116 | ps->gpe0_en[3] = inl(ACPI_BASE_ADDRESS + GPE0_EN(3)); |
| 117 | |
| 118 | ps->gen_pmcon1 = pci_read_config16(PCH_DEV_LPC, GEN_PMCON_1); |
| 119 | ps->gen_pmcon2 = pci_read_config16(PCH_DEV_LPC, GEN_PMCON_2); |
| 120 | ps->gen_pmcon3 = pci_read_config16(PCH_DEV_LPC, GEN_PMCON_3); |
| 121 | |
| 122 | ps->prev_sleep_state = prev_sleep_state(ps); |
| 123 | |
| 124 | dump_power_state(ps); |
| 125 | |
| 126 | return ps; |
| 127 | } |