blob: 0127d486a925cbe528eb4e9d41ecf274fd466493 [file] [log] [blame]
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Patrick Georgib890a122015-03-26 15:17:45 +010018 * Foundation, Inc.
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -070019 */
20
21#include <device/device.h>
22#include <device/pnp.h>
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -070023#include <pc80/keyboard.h>
24#include <arch/io.h>
Ryan Linbd978852014-09-22 23:29:16 -070025#include <delay.h>
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -070026#include <stdlib.h>
Edward O'Callaghan0f7ec312014-11-01 12:11:58 +110027#include <superio/conf_mode.h>
28
Edward O'Callaghandef00be2014-04-30 05:01:52 +100029#include "chip.h" /* FIXME */
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -070030#include "it8772f.h"
31
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -070032static inline u8 it8772f_envc_read(struct resource *res, u8 addr)
33{
34 outb(addr, res->base + 5);
35 return inb(res->base + 6);
36}
37
38static inline void it8772f_envc_write(struct resource *res, u8 addr, u8 value)
39{
40 outb(addr, res->base + 5);
41 outb(value, res->base + 6);
42}
43
Ryan Linbd978852014-09-22 23:29:16 -070044static void it8772f_extemp_force_idle_status(struct resource *res)
45{
46 u8 reg;
47 int retries = 10;
48
49 /* Wait up to 10ms for non-busy state. */
50 while (retries > 0) {
51 reg = it8772f_envc_read(res, IT8772F_EXTEMP_STATUS);
52
53 if ((reg & IT8772F_EXTEMP_STATUS_HOST_BUSY) == 0x0)
54 break;
55
56 retries--;
57
58 mdelay(1);
59 }
60
61 if (retries == 0 && (reg & IT8772F_EXTEMP_STATUS_HOST_BUSY) == 0x1) {
62 /*
63 * SIO is busy due to unfinished peci transaction.
64 * Re-configure Register 0x8E to terminate processes.
65 */
66 it8772f_envc_write(res, IT8772F_EXTEMP_CONTROL,
67 IT8772F_EXTEMP_CONTROL_AUTO_4HZ |
68 IT8772F_EXTEMP_CONTROL_AUTO_START);
69 }
70}
71
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -070072/*
73 * Setup External Temperature to read via PECI into TMPINx register
74 */
75static void it8772f_enable_peci(struct resource *res, int tmpin)
76{
77 if (tmpin < 1 || tmpin > 3)
78 return;
79
80 /* Enable PECI interface */
81 it8772f_envc_write(res, IT8772F_INTERFACE_SELECT,
82 IT8772F_INTERFACE_SEL_PECI |
83 IT8772F_INTERFACE_SPEED_TOLERANCE);
84
85 /* Setup External Temperature using PECI GetTemp */
86 it8772f_envc_write(res, IT8772F_EXTEMP_ADDRESS,
87 PECI_CLIENT_ADDRESS);
88 it8772f_envc_write(res, IT8772F_EXTEMP_COMMAND,
89 PECI_GETTEMP_COMMAND);
90 it8772f_envc_write(res, IT8772F_EXTEMP_WRITE_LENGTH,
91 PECI_GETTEMP_WRITE_LENGTH);
92 it8772f_envc_write(res, IT8772F_EXTEMP_READ_LENGTH,
93 PECI_GETTEMP_READ_LENGTH);
94 it8772f_envc_write(res, IT8772F_EXTEMP_CONTROL,
95 IT8772F_EXTEMP_CONTROL_AUTO_4HZ |
96 IT8772F_EXTEMP_CONTROL_AUTO_START);
97
98 /* External Temperature reported in TMPINx register */
99 it8772f_envc_write(res, IT8772F_ADC_TEMP_CHANNEL_ENABLE,
100 (tmpin & 3) << 6);
101}
102
103/*
104 * Setup a FAN PWM interface for software control
105 */
106static void it8772f_enable_fan(struct resource *res, int fan)
107{
108 u8 reg;
109
110 if (fan < 1 || fan > 3)
111 return;
112
113 /* Enable 6MHz (23.43kHz PWM) active high output */
114 reg = it8772f_envc_read(res, IT8772F_FAN_CTL_MODE);
115 reg |= IT8772F_FAN_CTL_ON(fan) |
116 IT8772F_FAN_PWM_CLOCK_6MHZ |
117 IT8772F_FAN_CTL_POLARITY_HIGH;
118 it8772f_envc_write(res, IT8772F_FAN_CTL_MODE, reg);
119
120 /* Enable output in smart mode */
121 reg = it8772f_envc_read(res, IT8772F_FAN_MAIN_CTL);
122 reg |= IT8772F_FAN_MAIN_CTL_TAC_SMART(fan);
123 reg |= IT8772F_FAN_MAIN_CTL_TAC_EN(fan);
124 it8772f_envc_write(res, IT8772F_FAN_MAIN_CTL, reg);
125
126 switch (fan) {
127 case 2:
128 /* Enable software operation */
129 it8772f_envc_write(res, IT8772F_FAN_CTL2_PWM_MODE,
130 IT8772F_FAN_CTL_PWM_MODE_SOFTWARE);
131 /* Disable Smoothing */
132 it8772f_envc_write(res, IT8772F_FAN_CTL2_AUTO_MODE,
133 IT8772F_FAN_CTL_AUTO_SMOOTHING_DIS);
134 /* Set a default medium fan speed */
135 it8772f_envc_write(res, IT8772F_FAN_CTL2_PWM_START, 0x80);
136 break;
137 case 3:
138 /* Enable software operation */
139 it8772f_envc_write(res, IT8772F_FAN_CTL3_PWM_MODE,
140 IT8772F_FAN_CTL_PWM_MODE_SOFTWARE);
141 /* Disable Smoothing */
142 it8772f_envc_write(res, IT8772F_FAN_CTL3_AUTO_MODE,
143 IT8772F_FAN_CTL_AUTO_SMOOTHING_DIS);
144 /* Set a default medium fan speed */
145 it8772f_envc_write(res, IT8772F_FAN_CTL3_PWM_START, 0x80);
146 break;
147 }
148}
149
Edward O'Callaghanf21bdc32014-10-21 07:43:41 +1100150static void it8772f_init(struct device *dev)
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -0700151{
152 struct superio_ite_it8772f_config *conf = dev->chip_info;
153 struct resource *res;
154
155 if (!dev->enabled)
156 return;
157
158 switch (dev->path.pnp.device) {
159 case IT8772F_EC:
160 res = find_resource(dev, PNP_IDX_IO0);
161 if (!res)
162 break;
163
164 /* Enable PECI if configured */
165 it8772f_enable_peci(res, conf->peci_tmpin);
166
167 /* Enable FANx if configured */
168 if (conf->fan1_enable)
169 it8772f_enable_fan(res, 1);
170 if (conf->fan2_enable)
171 it8772f_enable_fan(res, 2);
172 if (conf->fan3_enable)
173 it8772f_enable_fan(res, 3);
Ryan Linbd978852014-09-22 23:29:16 -0700174
175 /*
176 * System may get wrong temperature data when SIO is in
177 * busy state. Therefore, check the status and terminate
178 * processes if needed.
179 */
180 it8772f_extemp_force_idle_status(res);
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -0700181 break;
182 case IT8772F_GPIO:
183 /* Set GPIO output levels */
184 res = find_resource(dev, PNP_IDX_IO1);
185 if (res) {
186 if (conf->gpio_set1)
187 outb(conf->gpio_set1, res->base + 0);
188 if (conf->gpio_set2)
189 outb(conf->gpio_set2, res->base + 1);
190 if (conf->gpio_set3)
191 outb(conf->gpio_set3, res->base + 2);
192 if (conf->gpio_set4)
193 outb(conf->gpio_set4, res->base + 3);
194 if (conf->gpio_set5)
195 outb(conf->gpio_set5, res->base + 4);
196 if (conf->gpio_set6)
197 outb(conf->gpio_set6, res->base + 5);
198 }
199 break;
200 case IT8772F_KBCK:
201 if (!conf->skip_keyboard) {
202 set_kbc_ps2_mode();
Edward O'Callaghandef00be2014-04-30 05:01:52 +1000203 pc_keyboard_init();
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -0700204 }
205 break;
206 case IT8772F_KBCM:
207 break;
208 case IT8772F_IR:
209 break;
210 }
211}
212
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -0700213static struct device_operations ops = {
Nico Huber9cb09412013-06-15 15:30:19 +0200214 .read_resources = pnp_read_resources,
Nico Huber0b2ee932013-06-15 19:58:35 +0200215 .set_resources = pnp_set_resources,
216 .enable_resources = pnp_enable_resources,
217 .enable = pnp_alt_enable,
Nico Huber9cb09412013-06-15 15:30:19 +0200218 .init = it8772f_init,
Edward O'Callaghan0f7ec312014-11-01 12:11:58 +1100219 .ops_pnp_mode = &pnp_conf_mode_870155_aa,
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -0700220};
221
222static struct pnp_info pnp_dev_info[] = {
223 /* Floppy Disk Controller */
224 { &ops, IT8772F_FDC, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
225 /* Serial Port 1 */
226 { &ops, IT8772F_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
227 /* Environmental Controller */
Stefan Reinauer0108b932013-12-11 11:06:08 -0800228 { &ops, IT8772F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 |
229 PNP_MSC4 | PNP_MSC10,
Stefan Reinauerb0dd1d92012-03-30 15:04:07 -0700230 {0x0ff8, 0}, {0x0ffc, 4}, },
231 /* KBC Keyboard */
232 { &ops, IT8772F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
233 {0x0fff, 0}, {0x0fff, 4}, },
234 /* KBC Mouse */
235 { &ops, IT8772F_KBCM, PNP_IRQ0, },
236 /* 27 GPIOs */
237 { &ops, IT8772F_GPIO, PNP_IO0 | PNP_IO1,
238 {0x0fff, 0}, {0x0ff8, 0}, },
239 /* Infrared */
240 { &ops, IT8772F_IR, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
241};
242
243static void enable_dev(struct device *dev)
244{
245 pnp_enable_devices(dev, &pnp_ops,
246 ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
247}
248
249struct chip_operations superio_ite_it8772f_ops = {
250 CHIP_NAME("ITE IT8772F Super I/O")
251 .enable_dev = enable_dev,
252};