blob: f5dbbe4e89eda17219e7332a5ae4905b21e3f4bc [file] [log] [blame]
Marc Jones54b8e7a2013-10-29 17:57:30 -06001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2010 Google Inc.
Martin Roth2dd3f872014-04-25 15:09:27 -06005# Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
Marc Jones54b8e7a2013-10-29 17:57:30 -06006#
7# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
9# the Free Software Foundation; version 2 of the License.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
18# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19#
20
Martin Roth2dd3f872014-04-25 15:09:27 -060021subdirs-y += fsp
Marc Jones54b8e7a2013-10-29 17:57:30 -060022ramstage-y += northbridge.c
23ramstage-y += gma.c
24
25ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
Marc Jones54b8e7a2013-10-29 17:57:30 -060026
27romstage-y += raminit.c
Marc Jones54b8e7a2013-10-29 17:57:30 -060028romstage-y += early_init.c
29romstage-y += report_platform.c
30romstage-y += ../../../arch/x86/lib/walkcbfs.S
Marc Jones54b8e7a2013-10-29 17:57:30 -060031
32smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
33smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
34
Martin Roth2dd3f872014-04-25 15:09:27 -060035INCLUDES += -I$(src)/northbridge/intel/fsp_sandybridge/fsp
Marc Jones54b8e7a2013-10-29 17:57:30 -060036
37$(obj)/northbridge/intel/fsp_sandybridge/acpi.ramstage.o : $(obj)/build.h