Julius Werner | 37d7ac8 | 2014-05-05 18:03:46 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Google, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
Patrick Georgi | b890a12 | 2015-03-26 15:17:45 +0100 | [diff] [blame] | 17 | * Foundation, Inc. |
Julius Werner | 37d7ac8 | 2014-05-05 18:03:46 -0700 | [diff] [blame] | 18 | */ |
| 19 | |
| 20 | #include <assert.h> |
| 21 | #include <timer.h> |
| 22 | #include <console/console.h> |
| 23 | #include <device/i2c.h> |
| 24 | |
| 25 | /* |
| 26 | * The implementation is based on Wikipedia. |
| 27 | */ |
| 28 | |
| 29 | #define DEBUG 0 /* Set to 1 for per-byte output */ |
| 30 | #define SPEW 0 /* Set to 1 for verbose bitwise/line-state output */ |
| 31 | #define DELAY_US 5 /* Default setup delay: 4us (+1 for timer inaccuracy) */ |
| 32 | #define TIMEOUT_US 50000 /* Maximum clock stretching time we want to allow */ |
| 33 | |
| 34 | #define spew(...) do { if (SPEW) printk(BIOS_SPEW, ##__VA_ARGS__); } while (0) |
| 35 | |
| 36 | struct software_i2c_ops *software_i2c[SOFTWARE_I2C_MAX_BUS]; |
| 37 | |
| 38 | /* |
| 39 | * Waits until either timeout_us have passed or (iff for_scl is set) until SCL |
| 40 | * goes high. Will report random line changes during the wait and return SCL. |
| 41 | */ |
| 42 | static int __wait(unsigned bus, int timeout_us, int for_scl) |
| 43 | { |
| 44 | int us; |
| 45 | int sda = software_i2c[bus]->get_sda(bus); |
| 46 | int scl = software_i2c[bus]->get_scl(bus); |
Aaron Durbin | 46ba480 | 2014-09-23 16:34:40 -0500 | [diff] [blame] | 47 | struct stopwatch sw; |
| 48 | |
| 49 | stopwatch_init_usecs_expire(&sw, timeout_us); |
Julius Werner | 37d7ac8 | 2014-05-05 18:03:46 -0700 | [diff] [blame] | 50 | |
| 51 | do { |
| 52 | int old_sda = sda; |
| 53 | int old_scl = scl; |
Aaron Durbin | 46ba480 | 2014-09-23 16:34:40 -0500 | [diff] [blame] | 54 | |
| 55 | us = stopwatch_duration_usecs(&sw); |
Julius Werner | 37d7ac8 | 2014-05-05 18:03:46 -0700 | [diff] [blame] | 56 | |
| 57 | if (old_sda != (sda = software_i2c[bus]->get_sda(bus))) |
| 58 | spew("[SDA transitioned to %d after %dus] ", sda, us); |
| 59 | if (old_scl != (scl = software_i2c[bus]->get_scl(bus))) |
| 60 | spew("[SCL transitioned to %d after %dus] ", scl, us); |
Aaron Durbin | 46ba480 | 2014-09-23 16:34:40 -0500 | [diff] [blame] | 61 | } while (!stopwatch_expired(&sw) && (!for_scl || !scl)); |
Julius Werner | 37d7ac8 | 2014-05-05 18:03:46 -0700 | [diff] [blame] | 62 | |
| 63 | return scl; |
| 64 | } |
| 65 | |
| 66 | /* Waits the default DELAY_US to allow line state to stabilize. */ |
| 67 | static void wait(unsigned bus) |
| 68 | { |
| 69 | __wait(bus, DELAY_US, 0); |
| 70 | } |
| 71 | |
| 72 | /* Waits until SCL goes high. Prints a contextual error message on timeout. */ |
| 73 | static int wait_for_scl(unsigned bus, const char *error_context) |
| 74 | { |
| 75 | if (!__wait(bus, TIMEOUT_US, 1)) { |
| 76 | printk(BIOS_ERR, "software_i2c(%d): ERROR: Clock stretching " |
| 77 | "timeout %s!\n", bus, error_context); |
| 78 | return -1; |
| 79 | } |
| 80 | |
| 81 | return 0; |
| 82 | } |
| 83 | |
| 84 | static int start_cond(unsigned bus) |
| 85 | { |
| 86 | spew("software_i2c(%d): Sending start condition... ", bus); |
| 87 | |
| 88 | /* SDA might not yet be high if repeated start. */ |
| 89 | software_i2c[bus]->set_sda(bus, 1); |
| 90 | wait(bus); |
| 91 | |
| 92 | /* Might need to wait for clock stretching if repeated start. */ |
| 93 | software_i2c[bus]->set_scl(bus, 1); |
| 94 | if (wait_for_scl(bus, "before start condition")) |
| 95 | return -1; |
| 96 | wait(bus); /* Repeated start setup time, minimum 4.7us */ |
| 97 | |
| 98 | if (!software_i2c[bus]->get_sda(bus)) { |
| 99 | printk(BIOS_ERR, "software_i2c(%d): Arbitration lost trying " |
| 100 | "to send start condition!\n", bus); |
| 101 | return -1; |
| 102 | } |
| 103 | |
| 104 | /* SCL is high, transition SDA low as first part of start condition. */ |
| 105 | software_i2c[bus]->set_sda(bus, 0); |
| 106 | wait(bus); |
| 107 | assert(software_i2c[bus]->get_scl(bus)); |
| 108 | |
| 109 | /* Pull SCL low to finish start condition (next pulse will be data). */ |
| 110 | software_i2c[bus]->set_scl(bus, 0); |
| 111 | |
| 112 | spew("Start condition transmitted!\n"); |
| 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | static int stop_cond(unsigned bus) |
| 117 | { |
| 118 | spew("software_i2c(%d): Sending stop condition... ", bus); |
| 119 | |
| 120 | /* SDA is unknown, set it to low. SCL must be low. */ |
| 121 | software_i2c[bus]->set_sda(bus, 0); |
| 122 | wait(bus); |
| 123 | |
| 124 | /* Clock stretching */ |
| 125 | assert(!software_i2c[bus]->get_scl(bus)); |
| 126 | software_i2c[bus]->set_scl(bus, 1); |
| 127 | if (wait_for_scl(bus, "before stop condition")) |
| 128 | return -1; |
| 129 | wait(bus); /* Stop bit setup time, minimum 4us */ |
| 130 | |
| 131 | /* SCL is high, transition SDA high to signal stop condition. */ |
| 132 | software_i2c[bus]->set_sda(bus, 1); |
| 133 | wait(bus); |
| 134 | if (!software_i2c[bus]->get_sda(bus)) { |
| 135 | printk(BIOS_WARNING, "software_i2c(%d): WARNING: SDA low after " |
| 136 | "stop condition... access by another master or line " |
| 137 | "stuck from faulty slave?\n", bus); |
| 138 | /* Could theoretically happen with multi-master, so no -1. */ |
| 139 | } |
| 140 | |
| 141 | spew("Stop condition transmitted\n"); |
| 142 | return 0; |
| 143 | } |
| 144 | |
| 145 | static int out_bit(unsigned bus, int bit) |
| 146 | { |
| 147 | spew("software_i2c(%d): Sending a %d bit... ", bus, bit); |
| 148 | |
| 149 | software_i2c[bus]->set_sda(bus, bit); |
| 150 | wait(bus); |
| 151 | |
| 152 | if (bit && !software_i2c[bus]->get_sda(bus)) { |
| 153 | printk(BIOS_ERR, "software_i2c(%d): ERROR: SDA wedged low " |
| 154 | "by slave before clock pulse on transmit!\n", bus); |
| 155 | return -1; |
| 156 | } |
| 157 | |
| 158 | /* Clock stretching */ |
| 159 | assert(!software_i2c[bus]->get_scl(bus)); |
| 160 | software_i2c[bus]->set_scl(bus, 1); |
| 161 | if (wait_for_scl(bus, "on transmit")) |
| 162 | return -1; |
| 163 | wait(bus); |
| 164 | |
| 165 | if (bit && !software_i2c[bus]->get_sda(bus)) { |
| 166 | printk(BIOS_ERR, "software_i2c(%d): ERROR: SDA wedged low " |
| 167 | "by slave after clock pulse on transmit!\n", bus); |
| 168 | return -1; |
| 169 | } |
| 170 | |
| 171 | assert(software_i2c[bus]->get_scl(bus)); |
| 172 | software_i2c[bus]->set_scl(bus, 0); |
| 173 | |
| 174 | spew("%d bit sent!\n", bit); |
| 175 | return 0; |
| 176 | } |
| 177 | |
| 178 | static int in_bit(unsigned bus) |
| 179 | { |
| 180 | int bit; |
| 181 | |
| 182 | spew("software_i2c(%d): Receiving a bit... ", bus); |
| 183 | |
| 184 | /* Let the slave drive data */ |
| 185 | software_i2c[bus]->set_sda(bus, 1); |
| 186 | wait(bus); |
| 187 | |
| 188 | /* Clock stretching */ |
| 189 | assert(!software_i2c[bus]->get_scl(bus)); |
| 190 | software_i2c[bus]->set_scl(bus, 1); |
| 191 | if (wait_for_scl(bus, "on receive")) |
| 192 | return -1; |
| 193 | |
| 194 | /* SCL is high, now data is valid */ |
| 195 | bit = software_i2c[bus]->get_sda(bus); |
| 196 | wait(bus); |
| 197 | assert(software_i2c[bus]->get_scl(bus)); |
| 198 | software_i2c[bus]->set_scl(bus, 0); |
| 199 | |
| 200 | spew("Received a %d!\n", bit); |
| 201 | |
| 202 | return bit; |
| 203 | } |
| 204 | |
| 205 | /* Write a byte to I2C bus. Return 0 if ack by the slave. */ |
| 206 | static int out_byte(unsigned bus, u8 byte) |
| 207 | { |
| 208 | unsigned bit; |
| 209 | int nack; |
| 210 | |
| 211 | for (bit = 0; bit < 8; bit++) |
| 212 | if (out_bit(bus, (byte >> (7 - bit)) & 0x1) < 0) |
| 213 | return -1; |
| 214 | |
| 215 | nack = in_bit(bus); |
| 216 | |
| 217 | if (DEBUG && nack >= 0) |
| 218 | printk(BIOS_DEBUG, "software_i2c(%d): wrote byte 0x%02x, " |
| 219 | "received %s\n", bus, byte, nack ? "NAK" : "ACK"); |
| 220 | |
| 221 | return nack; |
| 222 | } |
| 223 | |
| 224 | static int in_byte(unsigned bus, int ack) |
| 225 | { |
| 226 | u8 byte = 0; |
| 227 | int i; |
| 228 | for (i = 0; i < 8; ++i) { |
| 229 | int bit = in_bit(bus); |
| 230 | if (bit < 0) |
| 231 | return -1; |
| 232 | byte = (byte << 1) | bit; |
| 233 | } |
| 234 | |
| 235 | if (out_bit(bus, !ack) < 0) |
| 236 | return -1; |
| 237 | |
| 238 | if (DEBUG) |
| 239 | printk(BIOS_DEBUG, "software_i2c(%d): read byte 0x%02x, " |
| 240 | "sent %s\n", bus, byte, ack ? "ACK" : "NAK"); |
| 241 | |
| 242 | return byte; |
| 243 | } |
| 244 | |
| 245 | int software_i2c_transfer(unsigned bus, struct i2c_seg *segments, int count) |
| 246 | { |
| 247 | int i; |
| 248 | struct i2c_seg *seg; |
| 249 | |
| 250 | for (seg = segments; seg - segments < count; seg++) { |
| 251 | if (start_cond(bus) < 0) |
| 252 | return -1; |
| 253 | if (out_byte(bus, seg->chip << 1 | !!seg->read) < 0) |
| 254 | return -1; |
| 255 | for (i = 0; i < seg->len; i++) { |
| 256 | int ret; |
| 257 | if (seg->read) { |
| 258 | ret = in_byte(bus, i < seg->len - 1); |
| 259 | seg->buf[i] = (u8)ret; |
| 260 | } else { |
| 261 | ret = out_byte(bus, seg->buf[i]); |
| 262 | } |
| 263 | if (ret < 0) |
| 264 | return -1; |
| 265 | } |
| 266 | } |
| 267 | if (stop_cond(bus) < 0) |
| 268 | return -1; |
| 269 | |
| 270 | return 0; |
| 271 | } |
| 272 | |
| 273 | void software_i2c_wedge_ack(unsigned bus, u8 chip) |
| 274 | { |
| 275 | int i; |
| 276 | |
| 277 | /* Start a command to 'chip'... */ |
| 278 | start_cond(bus); |
| 279 | |
| 280 | /* Send the address bits but don't yet read the ACK. */ |
| 281 | chip <<= 1; |
| 282 | for (i = 0; i < 8; ++i) |
| 283 | out_bit(bus, (chip >> (7 - i)) & 0x1); |
| 284 | |
| 285 | /* Let the slave drive it's ACK but keep the clock high forever. */ |
| 286 | software_i2c[bus]->set_sda(bus, 1); |
| 287 | wait(bus); |
| 288 | software_i2c[bus]->set_scl(bus, 1); |
| 289 | wait_for_scl(bus, "on wedge_ack()"); |
| 290 | |
| 291 | printk(BIOS_INFO, "software_i2c(%d): wedged address write on slave " |
| 292 | "ACK. SDA %d, SCL %d\n", bus, software_i2c[bus]->get_sda(bus), |
| 293 | software_i2c[bus]->get_scl(bus)); |
| 294 | } |
| 295 | |
| 296 | void software_i2c_wedge_read(unsigned bus, u8 chip, u8 reg, int bits) |
| 297 | { |
| 298 | int i; |
| 299 | |
| 300 | /* Start a command to 'chip'... */ |
| 301 | start_cond(bus); |
| 302 | out_byte(bus, chip << 1); |
| 303 | /* ...for register 'reg'. */ |
| 304 | out_byte(bus, reg); |
| 305 | |
| 306 | /* Start a read command... */ |
| 307 | start_cond(bus); |
| 308 | out_byte(bus, chip << 1 | 1); |
| 309 | |
| 310 | /* Read bit_count bits and stop */ |
| 311 | for (i = 0; i < bits; ++i) |
| 312 | in_bit(bus); |
| 313 | |
| 314 | /* Let the slave drive SDA but keep the clock high forever. */ |
| 315 | software_i2c[bus]->set_sda(bus, 1); |
| 316 | wait(bus); |
| 317 | software_i2c[bus]->set_scl(bus, 1); |
| 318 | wait_for_scl(bus, "on wedge_read()"); |
| 319 | |
| 320 | printk(BIOS_INFO, "software_i2c(%d): wedged data read after %d bits. " |
| 321 | "SDA %d, SCL %d\n", bus, bits, software_i2c[bus]->get_sda(bus), |
| 322 | software_i2c[bus]->get_scl(bus)); |
| 323 | } |
| 324 | |
| 325 | void software_i2c_wedge_write(unsigned bus, u8 chip, u8 reg, int bits) |
| 326 | { |
| 327 | int i; |
| 328 | |
| 329 | /* Start a command to 'chip'... */ |
| 330 | start_cond(bus); |
| 331 | out_byte(bus, chip << 1); |
| 332 | |
| 333 | /* Write bit_count register bits and stop */ |
| 334 | for (i = 0; i < bits; ++i) |
| 335 | out_bit(bus, (reg >> (7 - i)) & 0x1); |
| 336 | |
| 337 | /* Pretend to write another 1 bit but keep the clock high forever. */ |
| 338 | software_i2c[bus]->set_sda(bus, 1); |
| 339 | wait(bus); |
| 340 | software_i2c[bus]->set_scl(bus, 1); |
| 341 | wait_for_scl(bus, "on wedge_write()"); |
| 342 | |
| 343 | printk(BIOS_INFO, "software_i2c(%d): wedged data write after %d bits. " |
| 344 | "SDA %d, SCL %d\n", bus, bits, software_i2c[bus]->get_sda(bus), |
| 345 | software_i2c[bus]->get_scl(bus)); |
| 346 | } |