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Frank Vibrans2b4c8312011-02-14 18:30:54 +00001/* $NoKeywords:$ */
2/**
3 * @file
4 *
5 * mfParallelTraining.h
6 *
7 * Header file for the parallel training feature
8 *
9 * @xrefitem bom "File Content Label" "Release Content"
10 * @e project: AGESA
11 * @e sub-project: (Mem)
12 * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
13 *
14 **/
15/*
16 *****************************************************************************
17 *
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
19 * All rights reserved.
Edward O'Callaghane963b382014-07-06 19:27:14 +100020 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +000021 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
Edward O'Callaghane963b382014-07-06 19:27:14 +100028 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
Frank Vibrans2b4c8312011-02-14 18:30:54 +000030 * from this software without specific prior written permission.
Edward O'Callaghane963b382014-07-06 19:27:14 +100031 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +000032 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Edward O'Callaghane963b382014-07-06 19:27:14 +100042 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +000043 * ***************************************************************************
44 *
45 */
46
47
48#ifndef _MFPARALLELTRAINING_H_
49#define _MFPARALLELTRAINING_H_
50
51/*----------------------------------------------------------------------------
52 * Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
53 *
54 *----------------------------------------------------------------------------
55 */
56
57/*-----------------------------------------------------------------------------
58 * DEFINITIONS AND MACROS
59 *
60 *-----------------------------------------------------------------------------
61 */
62
63/*----------------------------------------------------------------------------
64 * TYPEDEFS, STRUCTURES, ENUMS
65 *
66 *----------------------------------------------------------------------------
67 */
68
69typedef BOOLEAN (*REMOTE_NBBLOCK_CONSTRUCTOR) (
70 IN OUT MEM_NB_BLOCK *NBPtr,
71 IN DIE_STRUCT *MCTPtr,
72 IN MEM_FEAT_BLOCK_NB *FeatPtr
73);
74
75///< This structure defines the environment on the AP for parallel training
76typedef struct _REMOTE_TRAINING_ENV {
77 IN OUT AMD_CONFIG_PARAMS StdHeader; ///< Config pointer of BSP
78 IN OUT AGESA_STATUS (*GetPlatformCfg[MAX_PLATFORM_TYPES]) (struct _MEM_DATA_STRUCT *MemData, UINT8 SocketID, CH_DEF_STRUCT *CurrentChannel); ///< look-up platform info
79 IN OUT BOOLEAN (*ErrorHandling)(struct _DIE_STRUCT *MCTPtr, UINT8 DCT, UINT16 ChipSelMask, AMD_CONFIG_PARAMS *StdHeader); ///< Error Handling
80 IN REMOTE_NBBLOCK_CONSTRUCTOR NBBlockCtor; ///< NB Block constructor
81 IN MEM_FEAT_BLOCK_NB *FeatPtr; ///< Feature block pointer
82 IN UINT8 *TableBasedAlterations; ///< Point to an array of data bytes describing desired modifications to register settings
83 IN PSO_TABLE *PlatformMemoryConfiguration; ///< Point to platform config table
84 IN UINT32 HoleBase; ///< Used for Memtyping
85 IN UINT32 UmaSize; ///< Used for Memtyping
86 IN UINT16 BottomIo; ///< Used for Memtyping
87 IN UINT32 SysLimit; ///< Used for Memtyping
88 IN UINT8 BspSocket; ///< Socket number of BSP
89 IN UINT8 BspCore; ///< Core number of BSP
90 IN DIE_STRUCT DieStruct; ///< Remote copy of Die Struct
91} REMOTE_TRAINING_ENV;
92
93///< This structure defines Die information
94typedef struct _DIE_INFO {
95 IN OUT UINT8 Socket; ///< Socket number
96 IN OUT UINT8 Core; ///< Core number
97 IN OUT BOOLEAN Training; ///< Training Flag, 1 = Training has been started on this core
98} DIE_INFO;
99
100
101/*----------------------------------------------------------------------------
102 * FUNCTIONS PROTOTYPE
103 *
104 *----------------------------------------------------------------------------
105 */
106
107BOOLEAN
108MemFParallelTraining (
109 IN OUT REMOTE_TRAINING_ENV *EnvPtr,
110 IN OUT AMD_CONFIG_PARAMS *StdHeader
111 );
112
113#endif /* _MFPARALLELTRAINING_H_ */
114
115