Felix Held | 3f3eca9 | 2020-01-23 17:12:32 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* This file is part of the coreboot project. */ |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 3 | |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 4 | #include <device/device.h> |
| 5 | #include <device/pnp.h> |
| 6 | #include <superio/conf_mode.h> |
Edward O'Callaghan | e1fe688 | 2014-04-30 20:41:41 +1000 | [diff] [blame] | 7 | #include <pc80/keyboard.h> |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 8 | |
Edward O'Callaghan | dd2e8c3 | 2014-04-24 02:58:11 +1000 | [diff] [blame] | 9 | #include "fintek_internal.h" |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 10 | #include "chip.h" |
| 11 | #include "f71869ad.h" |
| 12 | |
Edward O'Callaghan | f21bdc3 | 2014-10-21 07:43:41 +1100 | [diff] [blame] | 13 | static void f71869ad_init(struct device *dev) |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 14 | { |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 15 | if (!dev->enabled) |
| 16 | return; |
| 17 | |
Elyes HAOUAS | 0ce41f1 | 2018-11-13 10:03:31 +0100 | [diff] [blame] | 18 | switch (dev->path.pnp.device) { |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 19 | /* TODO: Might potentially need code for HWM or FDC etc. */ |
| 20 | case F71869AD_KBC: |
Timothy Pearson | 448e386 | 2015-11-24 14:12:01 -0600 | [diff] [blame] | 21 | pc_keyboard_init(NO_AUX_DEVICE); |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 22 | break; |
Edward O'Callaghan | dd2e8c3 | 2014-04-24 02:58:11 +1000 | [diff] [blame] | 23 | case F71869AD_HWM: |
| 24 | f71869ad_multifunc_init(dev); |
Edward O'Callaghan | 63f28c0 | 2014-04-26 15:21:45 +1000 | [diff] [blame] | 25 | f71869ad_hwm_init(dev); |
Edward O'Callaghan | dd2e8c3 | 2014-04-24 02:58:11 +1000 | [diff] [blame] | 26 | break; |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 27 | } |
| 28 | } |
| 29 | |
| 30 | static struct device_operations ops = { |
| 31 | .read_resources = pnp_read_resources, |
| 32 | .set_resources = pnp_set_resources, |
| 33 | .enable_resources = pnp_enable_resources, |
| 34 | .enable = pnp_alt_enable, |
| 35 | .init = f71869ad_init, |
| 36 | .ops_pnp_mode = &pnp_conf_mode_8787_aa, |
| 37 | }; |
| 38 | |
| 39 | /* |
Felix Held | b666793 | 2014-07-15 19:36:43 +0200 | [diff] [blame] | 40 | * io_info contains the mask 0x07f8. Given 8 register, each 8 bits wide of a |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 41 | * logical device we need a mask of the following form: |
| 42 | * |
| 43 | * MSB LSB |
| 44 | * v v |
| 45 | * 0x[15..11][10..3][2..0] |
| 46 | * ------ ^^^^^ ^^^^ |
| 47 | * null | | |
| 48 | * | +------ Register index |
| 49 | * | |
| 50 | * +------------- Compare against base address and |
| 51 | * asserts a chip_select on match. |
| 52 | * |
| 53 | * i.e., 0x07F8 = [00000][11111111][000] |
| 54 | * |
Edward O'Callaghan | b5fc67a | 2014-02-10 12:08:36 +1100 | [diff] [blame] | 55 | * NOTE: Be sure to set these in your devicetree.cb, i.e. |
| 56 | * |
| 57 | * chip superio/fintek/f71869ad |
| 58 | * device pnp 4e.00 off # Floppy |
| 59 | * io 0x60 = 0x3f0 |
| 60 | * irq 0x70 = 6 |
| 61 | * drq 0x74 = 2 |
| 62 | * end |
| 63 | * device pnp 4e.01 on # COM1 |
| 64 | * io 0x60 = 0x3f8 |
| 65 | * irq 0x70 = 4 |
| 66 | * end |
| 67 | * device pnp 4e.02 off # COM2 |
| 68 | * io 0x60 = 0x2f8 |
| 69 | * irq 0x70 = 3 |
| 70 | * end |
| 71 | * device pnp 4e.03 off # Parallel Port |
| 72 | * io 0x60 = 0x378 |
| 73 | * irq 0x70 = 7 |
| 74 | * drq 0x74 = 3 |
| 75 | * end |
| 76 | * device pnp 4e.04 on # Hardware Monitor |
| 77 | * io 0x60 = 0x295 |
| 78 | * irq 0x70 = 0 |
| 79 | * end |
| 80 | * device pnp 4e.05 on # KBC |
| 81 | * io 0x60 = 0x060 |
| 82 | * irq 0x70 = 1 # Keyboard IRQ |
| 83 | * irq 0x72 = 12 # Mouse IRQ |
| 84 | * end |
| 85 | * device pnp 4e.06 off end # GPIO |
Edward O'Callaghan | c848098 | 2014-05-08 19:50:55 +1000 | [diff] [blame] | 86 | * device pnp 4e.07 on end # WDT |
| 87 | * device pnp 4e.08 off end # CIR |
| 88 | * device pnp 4e.0a on end # PME |
Edward O'Callaghan | b5fc67a | 2014-02-10 12:08:36 +1100 | [diff] [blame] | 89 | * end # f71869ad |
| 90 | * |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 91 | */ |
| 92 | static struct pnp_info pnp_dev_info[] = { |
Felix Held | 8ac8ac6 | 2018-07-06 21:43:34 +0200 | [diff] [blame] | 93 | { NULL, F71869AD_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, }, |
| 94 | { NULL, F71869AD_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
| 95 | { NULL, F71869AD_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
| 96 | { NULL, F71869AD_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, }, |
| 97 | { NULL, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, }, |
| 98 | { NULL, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, }, |
| 99 | { NULL, F71869AD_GPIO, }, |
| 100 | { NULL, F71869AD_WDT, }, |
| 101 | { NULL, F71869AD_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
| 102 | { NULL, F71869AD_PME, }, |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 103 | }; |
| 104 | |
Edward O'Callaghan | f21bdc3 | 2014-10-21 07:43:41 +1100 | [diff] [blame] | 105 | static void enable_dev(struct device *dev) |
Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 106 | { |
| 107 | pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); |
| 108 | } |
| 109 | |
| 110 | struct chip_operations superio_fintek_f71869ad_ops = { |
| 111 | CHIP_NAME("Fintek F71869AD Super I/O") |
| 112 | .enable_dev = enable_dev |
| 113 | }; |