blob: e7e914759da191bff48ff4df3d1f867a385747e8 [file] [log] [blame]
Stefan Reinauerabc0c852010-11-22 08:09:50 +00001/*
2 * This file is part of the coreboot project.
Stefan Reinauer5ff7c132011-10-31 12:56:45 -07003 *
Stefan Reinauerabc0c852010-11-22 08:09:50 +00004 * Copyright (C) 2003 Eric Biederman
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Stefan Reinauerabc0c852010-11-22 08:09:50 +000015 */
16
17#include <arch/io.h>
Edward O'Callaghan0ae068e2014-06-21 21:42:25 +100018#include <elog.h>
Stefan Reinauerabc0c852010-11-22 08:09:50 +000019#include <console/console.h>
Edward O'Callaghan0ae068e2014-06-21 21:42:25 +100020#include <device/device.h>
Duncan Laurieb6e97b12012-09-09 19:09:56 -070021#include <pc80/mc146818rtc.h>
Duncan Lauriee807c342013-06-10 09:53:33 -070022#include <smp/spinlock.h>
Aaron Durbin9acd39d2016-05-24 14:47:10 -050023#include <rules.h>
Stefan Reinauerabc0c852010-11-22 08:09:50 +000024
25/* Write POST information */
26
Alexandru Gagniucf88204e2012-08-03 13:20:57 -050027/* someday romcc will be gone. */
28#ifndef __ROMCC__
29/* Some mainboards have very nice features beyond just a simple display.
30 * They can override this function.
31 */
32void __attribute__((weak)) mainboard_post(uint8_t value)
33{
34}
35
36#else
37/* This just keeps the number of #ifs to a minimum */
38#define mainboard_post(x)
39#endif
40
Martin Roth53de6cd2017-06-09 09:27:08 -060041#if IS_ENABLED(CONFIG_CMOS_POST)
Duncan Laurie1fc34612012-09-09 19:14:45 -070042
Duncan Lauriee807c342013-06-10 09:53:33 -070043DECLARE_SPIN_LOCK(cmos_post_lock)
44
Aaron Durbin9acd39d2016-05-24 14:47:10 -050045#if ENV_RAMSTAGE
Duncan Laurie1fc34612012-09-09 19:14:45 -070046void cmos_post_log(void)
47{
Duncan Lauriee807c342013-06-10 09:53:33 -070048 u8 code = 0;
Martin Roth53de6cd2017-06-09 09:27:08 -060049#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)
Duncan Lauried5686fe2013-06-10 10:21:41 -070050 u32 extra = 0;
51#endif
Duncan Lauriee807c342013-06-10 09:53:33 -070052
53 spin_lock(&cmos_post_lock);
Duncan Laurie1fc34612012-09-09 19:14:45 -070054
55 /* Get post code from other bank */
56 switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
57 case CMOS_POST_BANK_0_MAGIC:
58 code = cmos_read(CMOS_POST_BANK_1_OFFSET);
Martin Roth53de6cd2017-06-09 09:27:08 -060059#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)
Duncan Lauried5686fe2013-06-10 10:21:41 -070060 extra = cmos_read32(CMOS_POST_BANK_1_EXTRA);
61#endif
Duncan Laurie1fc34612012-09-09 19:14:45 -070062 break;
63 case CMOS_POST_BANK_1_MAGIC:
64 code = cmos_read(CMOS_POST_BANK_0_OFFSET);
Martin Roth53de6cd2017-06-09 09:27:08 -060065#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)
Duncan Lauried5686fe2013-06-10 10:21:41 -070066 extra = cmos_read32(CMOS_POST_BANK_0_EXTRA);
67#endif
Duncan Laurie1fc34612012-09-09 19:14:45 -070068 break;
Duncan Laurie1fc34612012-09-09 19:14:45 -070069 }
70
Duncan Lauriee807c342013-06-10 09:53:33 -070071 spin_unlock(&cmos_post_lock);
72
Duncan Laurie1fc34612012-09-09 19:14:45 -070073 /* Check last post code in previous boot against normal list */
74 switch (code) {
75 case POST_OS_BOOT:
76 case POST_OS_RESUME:
77 case POST_ENTER_ELF_BOOT:
78 case 0:
79 break;
80 default:
81 printk(BIOS_WARNING, "POST: Unexpected post code "
82 "in previous boot: 0x%02x\n", code);
Martin Roth53de6cd2017-06-09 09:27:08 -060083#if IS_ENABLED(CONFIG_ELOG)
Duncan Laurie1fc34612012-09-09 19:14:45 -070084 elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code);
Martin Roth53de6cd2017-06-09 09:27:08 -060085#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)
Duncan Lauried5686fe2013-06-10 10:21:41 -070086 if (extra)
87 elog_add_event_dword(ELOG_TYPE_POST_EXTRA, extra);
88#endif
Duncan Laurie1fc34612012-09-09 19:14:45 -070089#endif
90 }
91}
Duncan Lauried5686fe2013-06-10 10:21:41 -070092
Martin Roth53de6cd2017-06-09 09:27:08 -060093#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)
Duncan Lauried5686fe2013-06-10 10:21:41 -070094void post_log_extra(u32 value)
95{
96 spin_lock(&cmos_post_lock);
97
98 switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
99 case CMOS_POST_BANK_0_MAGIC:
100 cmos_write32(CMOS_POST_BANK_0_EXTRA, value);
101 break;
102 case CMOS_POST_BANK_1_MAGIC:
103 cmos_write32(CMOS_POST_BANK_1_EXTRA, value);
104 break;
105 }
106
107 spin_unlock(&cmos_post_lock);
108}
Duncan Laurie8adf7a22013-06-10 10:34:20 -0700109
110void post_log_path(struct device *dev)
111{
112 if (dev) {
113 /* Encode path into lower 3 bytes */
114 u32 path = dev_path_encode(dev);
115 /* Upper byte contains the log type */
116 path |= CMOS_POST_EXTRA_DEV_PATH << 24;
117 post_log_extra(path);
118 }
119}
120
121void post_log_clear(void)
122{
123 post_log_extra(0);
124}
Duncan Lauried5686fe2013-06-10 10:21:41 -0700125#endif /* CONFIG_CMOS_POST_EXTRA */
Aaron Durbin9acd39d2016-05-24 14:47:10 -0500126#endif /* ENV_RAMSTAGE */
Duncan Laurie1fc34612012-09-09 19:14:45 -0700127
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700128static void cmos_post_code(u8 value)
129{
Duncan Lauriee807c342013-06-10 09:53:33 -0700130 spin_lock(&cmos_post_lock);
131
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700132 switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
133 case CMOS_POST_BANK_0_MAGIC:
134 cmos_write(value, CMOS_POST_BANK_0_OFFSET);
135 break;
136 case CMOS_POST_BANK_1_MAGIC:
137 cmos_write(value, CMOS_POST_BANK_1_OFFSET);
138 break;
139 }
Duncan Lauriee807c342013-06-10 09:53:33 -0700140
141 spin_unlock(&cmos_post_lock);
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700142}
143#endif /* CONFIG_CMOS_POST */
144
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000145void post_code(uint8_t value)
146{
Martin Roth53de6cd2017-06-09 09:27:08 -0600147#if !IS_ENABLED(CONFIG_NO_POST)
148#if IS_ENABLED(CONFIG_CONSOLE_POST)
Stefan Reinauerd6865222015-01-05 13:12:38 -0800149 printk(BIOS_EMERG, "POST: 0x%02x\n", value);
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000150#endif
Martin Roth53de6cd2017-06-09 09:27:08 -0600151#if IS_ENABLED(CONFIG_CMOS_POST)
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700152 cmos_post_code(value);
153#endif
Martin Roth53de6cd2017-06-09 09:27:08 -0600154#if IS_ENABLED(CONFIG_POST_IO)
Idwer Vollering5809a732014-03-11 15:36:21 +0000155 outb(value, CONFIG_POST_IO_PORT);
David Hendricks6b908d02012-11-05 12:34:09 -0800156#endif
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000157#endif
Alexandru Gagniucf88204e2012-08-03 13:20:57 -0500158 mainboard_post(value);
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000159}