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Marshall Dawsonbeb12882017-05-23 18:57:47 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2017 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
Justin TerAvest3fe3f042018-02-14 19:10:15 -070016#include <baseboard/variants.h>
Marshall Dawsonbeb12882017-05-23 18:57:47 -060017#include <bootblock_common.h>
Chris Ching97ab8802018-02-06 10:28:49 -070018#include <soc/gpio.h>
Marc Jonesdfeb1c42017-08-07 19:08:24 -060019#include <soc/southbridge.h>
Martin Roth6c623ca2017-11-16 22:14:53 -070020#include <variant/ec.h>
Chris Ching97ab8802018-02-06 10:28:49 -070021#include <variant/gpio.h>
Marshall Dawsonbeb12882017-05-23 18:57:47 -060022
Justin TerAvest23cff8b2018-02-28 11:45:02 -070023void bootblock_mainboard_early_init(void)
Marshall Dawsonbeb12882017-05-23 18:57:47 -060024{
Justin TerAvest3fe3f042018-02-14 19:10:15 -070025 size_t num_gpios;
26 const struct soc_amd_stoneyridge_gpio *gpios;
Martin Rothbf7dea02018-03-19 16:31:33 -060027
28 /* Enable the EC as soon as we have visibility */
29 mainboard_ec_init();
30
Justin TerAvest3fe3f042018-02-14 19:10:15 -070031 gpios = variant_early_gpio_table(&num_gpios);
32 sb_program_gpios(gpios, num_gpios);
Justin TerAvest23cff8b2018-02-28 11:45:02 -070033}
Justin TerAvest3fe3f042018-02-14 19:10:15 -070034
Justin TerAvest23cff8b2018-02-28 11:45:02 -070035void bootblock_mainboard_init(void)
36{
Marc Jones583806a2017-04-20 16:51:10 -060037 /* Setup TPM decode before verstage */
Marc Jonesdfeb1c42017-08-07 19:08:24 -060038 sb_tpm_decode_spi();
Chris Ching97ab8802018-02-06 10:28:49 -070039
40 /* Configure cr50 interrupt pin for use in polling tpm status */
41 if (IS_ENABLED(CONFIG_MAINBOARD_HAS_TPM_CR50)) {
42 const uint32_t flags = GPIO_EDGEL_TRIG | GPIO_ACTIVE_LOW |
43 GPIO_INT_STATUS_EN;
44 gpio_set_interrupt(H1_PCH_INT, flags);
45 }
Marshall Dawsonbeb12882017-05-23 18:57:47 -060046}