Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2018 Intel Corp. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <arch/acpi.h> |
| 17 | #include <baseboard/variants.h> |
| 18 | #include <boardid.h> |
| 19 | #include <console/console.h> |
| 20 | #include <device/device.h> |
Furquan Shaikh | 617fcf3 | 2018-08-08 13:30:44 -0700 | [diff] [blame] | 21 | #include <device/pci_def.h> |
| 22 | #include <device/pci_ops.h> |
Furquan Shaikh | 367956d5 | 2018-07-20 13:50:16 -0700 | [diff] [blame] | 23 | #include <ec/google/chromeec/ec.h> |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 24 | #include <ec/ec.h> |
| 25 | #include <nhlt.h> |
Furquan Shaikh | 367956d5 | 2018-07-20 13:50:16 -0700 | [diff] [blame] | 26 | #include <smbios.h> |
Aaron Durbin | 2fcc034 | 2018-07-25 08:06:21 -0600 | [diff] [blame] | 27 | #include <soc/cpu.h> |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 28 | #include <soc/gpio.h> |
| 29 | #include <soc/nhlt.h> |
Furquan Shaikh | 617fcf3 | 2018-08-08 13:30:44 -0700 | [diff] [blame] | 30 | #include <soc/pci_devs.h> |
| 31 | #include <stdint.h> |
Furquan Shaikh | 367956d5 | 2018-07-20 13:50:16 -0700 | [diff] [blame] | 32 | #include <string.h> |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 33 | #include <vendorcode/google/chromeos/chromeos.h> |
| 34 | #include <variant/ec.h> |
| 35 | #include <variant/gpio.h> |
| 36 | |
Furquan Shaikh | 617fcf3 | 2018-08-08 13:30:44 -0700 | [diff] [blame] | 37 | static bool is_cnvi_held_in_reset(void) |
| 38 | { |
| 39 | struct device *dev = dev_find_slot(0, PCH_DEVFN_CNVI); |
| 40 | uint32_t reg = pci_read_config32(dev, PCI_VENDOR_ID); |
| 41 | |
| 42 | /* |
| 43 | * If vendor/device ID for CNVi reads as 0xffffffff, then it is safe to |
| 44 | * assume that it is being held in reset. |
| 45 | */ |
| 46 | if (reg == 0xffffffff) |
| 47 | return true; |
| 48 | |
| 49 | return false; |
| 50 | } |
| 51 | |
Furquan Shaikh | 6542899 | 2018-08-09 10:11:26 -0700 | [diff] [blame] | 52 | static void disable_wifi_wake(void) |
| 53 | { |
| 54 | static const struct pad_config wifi_wake_gpio[] = { |
| 55 | PAD_NC(GPIO_119, UP_20K), |
| 56 | }; |
| 57 | |
| 58 | gpio_configure_pads(wifi_wake_gpio, ARRAY_SIZE(wifi_wake_gpio)); |
| 59 | } |
| 60 | |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 61 | static void mainboard_init(void *chip_info) |
| 62 | { |
| 63 | int boardid; |
Furquan Shaikh | 06a41f1 | 2018-07-25 14:30:59 -0700 | [diff] [blame] | 64 | const struct pad_config *base_pads; |
| 65 | const struct pad_config *override_pads; |
| 66 | size_t base_num, override_num; |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 67 | |
| 68 | boardid = board_id(); |
| 69 | printk(BIOS_INFO, "Board ID: %d\n", boardid); |
| 70 | |
Furquan Shaikh | 06a41f1 | 2018-07-25 14:30:59 -0700 | [diff] [blame] | 71 | base_pads = variant_base_gpio_table(&base_num); |
| 72 | override_pads = variant_override_gpio_table(&override_num); |
| 73 | |
| 74 | gpio_configure_pads_with_override(base_pads, base_num, |
| 75 | override_pads, override_num); |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 76 | |
Furquan Shaikh | 6542899 | 2018-08-09 10:11:26 -0700 | [diff] [blame] | 77 | if (!is_cnvi_held_in_reset()) |
| 78 | disable_wifi_wake(); |
| 79 | |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 80 | mainboard_ec_init(); |
| 81 | } |
| 82 | |
| 83 | static unsigned long mainboard_write_acpi_tables( |
Elyes HAOUAS | d129d43 | 2018-05-04 20:23:33 +0200 | [diff] [blame] | 84 | struct device *device, unsigned long current, acpi_rsdp_t *rsdp) |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 85 | { |
| 86 | uintptr_t start_addr; |
| 87 | uintptr_t end_addr; |
| 88 | struct nhlt *nhlt; |
| 89 | |
| 90 | start_addr = current; |
| 91 | |
| 92 | nhlt = nhlt_init(); |
| 93 | |
| 94 | if (nhlt == NULL) |
| 95 | return start_addr; |
| 96 | |
| 97 | variant_nhlt_init(nhlt); |
| 98 | |
| 99 | end_addr = nhlt_soc_serialize(nhlt, start_addr); |
| 100 | |
| 101 | if (end_addr != start_addr) |
| 102 | acpi_add_table(rsdp, (void *)start_addr); |
| 103 | |
| 104 | return end_addr; |
| 105 | } |
| 106 | |
Elyes HAOUAS | d129d43 | 2018-05-04 20:23:33 +0200 | [diff] [blame] | 107 | static void mainboard_enable(struct device *dev) |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 108 | { |
| 109 | dev->ops->write_acpi_tables = mainboard_write_acpi_tables; |
| 110 | dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; |
| 111 | } |
| 112 | |
| 113 | struct chip_operations mainboard_ops = { |
| 114 | .init = mainboard_init, |
| 115 | .enable_dev = mainboard_enable, |
| 116 | }; |
Furquan Shaikh | 367956d5 | 2018-07-20 13:50:16 -0700 | [diff] [blame] | 117 | |
| 118 | #define SKU_UNKNOWN 0xFFFFFFFF |
| 119 | #define SKU_MAX 255 |
| 120 | |
| 121 | static uint32_t get_board_sku(void) |
| 122 | { |
| 123 | static uint32_t sku_id = SKU_UNKNOWN; |
| 124 | |
| 125 | if (sku_id != SKU_UNKNOWN) |
| 126 | return sku_id; |
| 127 | |
| 128 | if (google_chromeec_cbi_get_sku_id(&sku_id)) |
| 129 | sku_id = SKU_UNKNOWN; |
| 130 | |
| 131 | return sku_id; |
| 132 | } |
| 133 | |
| 134 | const char *smbios_mainboard_sku(void) |
| 135 | { |
| 136 | static char sku_str[7]; /* sku{0..255} */ |
| 137 | uint32_t sku_id = get_board_sku(); |
| 138 | |
| 139 | if ((sku_id == SKU_UNKNOWN) || (sku_id > SKU_MAX)) { |
| 140 | printk(BIOS_ERR, "%s: Unexpected SKU ID %u\n", |
| 141 | __func__, sku_id); |
| 142 | return ""; |
| 143 | } |
| 144 | |
| 145 | snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id); |
| 146 | |
| 147 | return sku_str; |
| 148 | } |
Aaron Durbin | 2fcc034 | 2018-07-25 08:06:21 -0600 | [diff] [blame] | 149 | |
| 150 | void __weak variant_update_devtree(struct device *dev) |
| 151 | { |
| 152 | /* Place holder for common updates. */ |
| 153 | } |
| 154 | |
Furquan Shaikh | 617fcf3 | 2018-08-08 13:30:44 -0700 | [diff] [blame] | 155 | /* |
| 156 | * Check if CNVi PCI device is released from reset. If yes, then the system is |
| 157 | * booting with CNVi module. In this case, the PCIe device for WiFi needs to |
| 158 | * be disabled. If CNVi device is held in reset, then disable it. |
| 159 | */ |
| 160 | static void wifi_device_update(void) |
| 161 | { |
| 162 | struct device *dev; |
| 163 | unsigned int devfn; |
| 164 | |
| 165 | if (is_cnvi_held_in_reset()) |
| 166 | devfn = PCH_DEVFN_CNVI; |
| 167 | else |
| 168 | devfn = PCH_DEVFN_PCIE1; |
| 169 | |
| 170 | dev = dev_find_slot(0, devfn); |
John Zhao | a2c0cf5 | 2018-08-20 10:27:39 -0700 | [diff] [blame] | 171 | if (dev) |
| 172 | dev->enabled = 0; |
Furquan Shaikh | 617fcf3 | 2018-08-08 13:30:44 -0700 | [diff] [blame] | 173 | } |
| 174 | |
Aaron Durbin | 2fcc034 | 2018-07-25 08:06:21 -0600 | [diff] [blame] | 175 | void mainboard_devtree_update(struct device *dev) |
| 176 | { |
Furquan Shaikh | 617fcf3 | 2018-08-08 13:30:44 -0700 | [diff] [blame] | 177 | /* Apply common devtree updates. */ |
| 178 | wifi_device_update(); |
| 179 | |
Aaron Durbin | 2fcc034 | 2018-07-25 08:06:21 -0600 | [diff] [blame] | 180 | /* Defer to variant for board-specific updates. */ |
| 181 | variant_update_devtree(dev); |
| 182 | } |