blob: 6b769b0397836bf4e49312389c7fb2df7e940894 [file] [log] [blame]
Edward O'Callaghan956c2982014-03-16 17:09:58 +11001chip northbridge/intel/sandybridge
2
3 # Enable DisplayPort Hotplug with 6ms pulse
4 register "gpu_dp_d_hotplug" = "0x06"
5
6 # Enable Panel as LVDS and configure power delays
7 register "gpu_panel_port_select" = "0" # LVDS
8 register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
9 register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
10 register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
Edward O'Callaghan5fcae802014-07-29 14:42:26 +100011 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
12 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
Vladimir Serbinenkoa71bdc32014-08-30 00:35:39 +020013 register "gfx.use_spread_spectrum_clock" = "1"
14 register "gfx.lvds_dual_channel" = "1"
15 register "gfx.link_frequency_270_mhz" = "1"
16 register "gfx.lvds_num_lanes" = "1"
Edward O'Callaghan5fcae802014-07-29 14:42:26 +100017 register "gpu_cpu_backlight" = "0x1155"
18 register "gpu_pch_backlight" = "0x11551155"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110019
20 device cpu_cluster 0 on
21 chip cpu/intel/socket_rPGA989
22 device lapic 0 on end
23 end
24 chip cpu/intel/model_206ax
25 # Magic APIC ID to locate this chip
26 device lapic 0xACAC off end
27
28 # Coordinate with HW_ALL
29 register "pstate_coord_type" = "0xfe"
30
31 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
32 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
33 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
34
35 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
36 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
37 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
38 end
39 end
40
41 device domain 0 on
42 device pci 00.0 on end # host bridge
Edward O'Callaghana8126432014-09-13 06:53:20 +100043 device pci 01.0 on end # PCIe Bridge for discrete graphics
Edward O'Callaghan956c2982014-03-16 17:09:58 +110044 device pci 02.0 on end # vga controller
45
46 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Edward O'Callaghan956c2982014-03-16 17:09:58 +110047 # GPI routing
48 # 0 No effect (default)
49 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
50 # 2 SCI (if corresponding GPIO_EN bit is also set)
51 register "alt_gp_smi_en" = "0x0000"
52 register "gpi1_routing" = "2"
Nicolas Reineckeb0922f02015-02-01 02:53:35 +010053 register "gpi13_routing" = "2"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110054
Edward O'Callaghancf6f9b92014-09-13 06:06:05 +100055 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock)
56 register "sata_port_map" = "0x3f"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110057 # Set max SATA speed to 6.0 Gb/s
58 register "sata_interface_speed_support" = "0x3"
59
60 register "gen1_dec" = "0x7c1601"
61 register "gen2_dec" = "0x0c15e1"
62 register "gen4_dec" = "0x0c06a1"
63
64 # Enable zero-based linear PCIe root port functions
65 register "pcie_port_coalesce" = "1"
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020066 register "c2_latency" = "101" # c2 not supported
67 register "p_cnt_throttling_supported" = "1"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110068
Vladimir Serbinenko36fa5b82014-10-28 23:43:20 +010069 register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
70
Edward O'Callaghan956c2982014-03-16 17:09:58 +110071 device pci 14.0 on end # USB 3.0 Controller
72 device pci 16.0 on end # Management Engine Interface 1
73 device pci 16.1 off end # Management Engine Interface 2
74 device pci 16.2 off end # Management Engine IDE-R
75 device pci 16.3 off end # Management Engine KT
76 device pci 19.0 on end # Intel Gigabit Ethernet
77 device pci 1a.0 on end # USB2 EHCI #2
78 device pci 1b.0 on end # High Definition Audio
79 device pci 1c.0 on end # PCIe Port #1
80 device pci 1c.1 on end # PCIe Port #2
81 device pci 1c.2 on end # PCIe Port #3 (expresscard)
82 device pci 1c.3 off end # PCIe Port #4
83 device pci 1c.4 off end # PCIe Port #5
84 device pci 1c.5 off end # PCIe Port #6
85 device pci 1c.6 off end # PCIe Port #7
86 device pci 1c.7 off end # PCIe Port #8
87 device pci 1d.0 on end # USB2 EHCI #1
88 device pci 1e.0 off end # PCI bridge
89 device pci 1f.0 on #LPC bridge
90 chip ec/lenovo/pmh7
91 device pnp ff.1 on # dummy
92 end
93 register "backlight_enable" = "0x01"
94 register "dock_event_enable" = "0x01"
95 end
96
97 chip ec/lenovo/h8
98 device pnp ff.2 on # dummy
99 io 0x60 = 0x62
100 io 0x62 = 0x66
101 io 0x64 = 0x1600
102 io 0x66 = 0x1604
103 end
104
Edward O'Callaghanfe365ac2014-03-16 17:24:18 +1100105 register "config0" = "0xa7"
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100106 register "config1" = "0x09"
107 register "config2" = "0xa0"
Edward O'Callaghanfe365ac2014-03-16 17:24:18 +1100108 register "config3" = "0xc2"
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100109
110 register "has_keyboard_backlight" = "1"
111
112 register "beepmask0" = "0x00"
113 register "beepmask1" = "0x86"
114 register "has_power_management_beeps" = "0"
115 register "event2_enable" = "0xff"
116 register "event3_enable" = "0xff"
117 register "event4_enable" = "0xd0"
118 register "event5_enable" = "0xfc"
119 register "event6_enable" = "0x00"
120 register "event7_enable" = "0x01"
121 register "event8_enable" = "0x7b"
122 register "event9_enable" = "0xff"
123 register "eventa_enable" = "0x01"
124 register "eventb_enable" = "0x00"
125 register "eventc_enable" = "0xff"
126 register "eventd_enable" = "0xff"
127 register "evente_enable" = "0x0d"
128 end
129 end # LPC bridge
130 device pci 1f.2 on end # SATA Controller 1
131 device pci 1f.3 on
132 # eeprom, 8 virtual devices, same chip
133 chip drivers/i2c/at24rf08c
134 device i2c 54 on end
135 device i2c 55 on end
136 device i2c 56 on end
137 device i2c 57 on end
138 device i2c 5c on end
139 device i2c 5d on end
140 device i2c 5e on end
141 device i2c 5f on end
142 end
143 end # SMBus
144 device pci 1f.5 off end # SATA Controller 2
145 device pci 1f.6 on end # Thermal
146 end
147 end
148end