blob: 31843814c2ac7339cde946cbcdabe4bf9f9b1e4f [file] [log] [blame]
Lee Leahy274d20a2016-05-15 13:52:36 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2016 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <arch/io.h>
17#include <console/console.h>
18#include <soc/ramstage.h>
Lee Leahy15843bd2016-05-15 15:05:56 -070019#include "reg_access.h"
Lee Leahy274d20a2016-05-15 13:52:36 -070020#include "gen1.h"
21#include "gen2.h"
22
Lee Leahy15843bd2016-05-15 15:05:56 -070023void mainboard_gpio_i2c_init(device_t dev)
24{
25 const struct reg_script *script;
26
27 printk(BIOS_INFO, "Galileo I2C chip initialization\n");
28
29 /* Determine the correct script for the board */
30 if (IS_ENABLED(CONFIG_GALILEO_GEN2))
31 script = gen2_i2c_init;
32 else
33 /* Determine which I2C address is in use */
34 script = (reg_legacy_gpio_read (R_QNC_GPIO_RGLVL_RESUME_WELL)
35 & GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO)
36 ? gen1_i2c_0x20_init : gen1_i2c_0x21_init;
37
38 /* Initialize the I2C chips */
39 reg_script_run(script);
40}
41
Lee Leahy274d20a2016-05-15 13:52:36 -070042void mainboard_gpio_init(void)
43{
44 const struct reg_script *script;
45
46 /* Initialize the GPIO controllers */
47 if (IS_ENABLED(CONFIG_GALILEO_GEN2))
48 script = gen2_gpio_init;
49 else
50 script = gen1_gpio_init;
51 reg_script_run(script);
52}
Lee Leahy5ef051a2016-04-29 15:16:54 -070053
54void mainboard_gpio_pcie_reset(uint32_t pin_value)
55{
56 uint32_t pin_number;
57 uint32_t value;
58
59 /* Determine the correct PCIe reset pin */
60 if (IS_ENABLED(CONFIG_GALILEO_GEN2))
61 pin_number = GEN2_PCI_RESET_RESUMEWELL_GPIO;
62 else
63 pin_number = GEN1_PCI_RESET_RESUMEWELL_GPIO;
64
65 /* Update the PCIe reset value */
66 value = reg_legacy_gpio_read(R_QNC_GPIO_RGLVL_RESUME_WELL);
67 value = (value & ~(1 << pin_number)) | ((pin_value & 1) << pin_number);
68 reg_legacy_gpio_write(R_QNC_GPIO_RGLVL_RESUME_WELL, value);
69}