Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 1 | uses CONFIG_HAVE_MP_TABLE |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 2 | uses CONFIG_CBFS |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 3 | uses CONFIG_HAVE_PIRQ_TABLE |
| 4 | uses CONFIG_USE_FALLBACK_IMAGE |
| 5 | uses CONFIG_HAVE_FALLBACK_BOOT |
| 6 | uses CONFIG_HAVE_HARD_RESET |
| 7 | uses CONFIG_IRQ_SLOT_COUNT |
| 8 | uses CONFIG_HAVE_OPTION_TABLE |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 9 | uses CONFIG_LOGICAL_CPUS |
| 10 | uses CONFIG_MAX_CPUS |
| 11 | uses CONFIG_IOAPIC |
| 12 | uses CONFIG_SMP |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 13 | uses CONFIG_FALLBACK_SIZE |
| 14 | uses CONFIG_ROM_SIZE |
| 15 | uses CONFIG_ROM_SECTION_SIZE |
| 16 | uses CONFIG_ROM_IMAGE_SIZE |
| 17 | uses CONFIG_ROM_SECTION_SIZE |
| 18 | uses CONFIG_ROM_SECTION_OFFSET |
Ed Swierk | be13dc7 | 2006-12-15 12:56:28 +0000 | [diff] [blame] | 19 | uses CONFIG_ROM_PAYLOAD |
| 20 | uses CONFIG_ROM_PAYLOAD_START |
Ed Swierk | 1a7a5b4 | 2006-12-15 11:42:16 +0000 | [diff] [blame] | 21 | uses CONFIG_COMPRESSED_PAYLOAD_LZMA |
Myles Watson | 15674b7 | 2007-12-09 17:18:29 +0000 | [diff] [blame] | 22 | uses CONFIG_PRECOMPRESSED_PAYLOAD |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 23 | uses CONFIG_PAYLOAD_SIZE |
| 24 | uses CONFIG_ROMBASE |
| 25 | uses CONFIG_XIP_ROM_SIZE |
| 26 | uses CONFIG_XIP_ROM_BASE |
| 27 | uses CONFIG_STACK_SIZE |
| 28 | uses CONFIG_HEAP_SIZE |
| 29 | uses CONFIG_USE_OPTION_TABLE |
| 30 | uses CONFIG_LB_CKS_RANGE_START |
| 31 | uses CONFIG_LB_CKS_RANGE_END |
| 32 | uses CONFIG_LB_CKS_LOC |
| 33 | uses CONFIG_MAINBOARD |
| 34 | uses CONFIG_MAINBOARD_PART_NUMBER |
| 35 | uses CONFIG_MAINBOARD_VENDOR |
| 36 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID |
| 37 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 38 | uses COREBOOT_EXTRA_VERSION |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 39 | uses CONFIG_UDELAY_TSC |
| 40 | uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 41 | uses CONFIG_RAMBASE |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 42 | uses CONFIG_GDB_STUB |
| 43 | uses CONFIG_CONSOLE_SERIAL8250 |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 44 | uses CONFIG_TTYS0_BAUD |
| 45 | uses CONFIG_TTYS0_BASE |
| 46 | uses CONFIG_TTYS0_LCS |
| 47 | uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL |
| 48 | uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL |
| 49 | uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 50 | uses CONFIG_CONSOLE_BTEXT |
| 51 | uses CC |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 52 | uses HOSTCC |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 53 | uses CONFIG_CROSS_COMPILE |
| 54 | uses CONFIG_OBJCOPY |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 55 | |
| 56 | |
| 57 | ### |
| 58 | ### Build options |
| 59 | ### |
| 60 | |
| 61 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 62 | ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 63 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 64 | default CONFIG_ROM_SIZE=1048576 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 65 | |
| 66 | ## |
| 67 | ## Build code for the fallback boot |
| 68 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 69 | default CONFIG_HAVE_FALLBACK_BOOT=1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 70 | |
| 71 | ## |
| 72 | ## Delay timer options |
| 73 | ## Use timer2 |
| 74 | ## |
| 75 | default CONFIG_UDELAY_TSC=1 |
| 76 | default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 |
| 77 | |
| 78 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 79 | ## Build code to reset the motherboard from coreboot |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 80 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 81 | default CONFIG_HAVE_HARD_RESET=1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 82 | |
| 83 | ## |
| 84 | ## Build code to export a programmable irq routing table |
| 85 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 86 | default CONFIG_HAVE_PIRQ_TABLE=1 |
| 87 | default CONFIG_IRQ_SLOT_COUNT=16 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 88 | |
| 89 | ## |
| 90 | ## Build code to export an x86 MP table |
| 91 | ## Useful for specifying IRQ routing values |
| 92 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 93 | default CONFIG_HAVE_MP_TABLE=1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 94 | |
| 95 | ## |
| 96 | ## Build code to export a CMOS option table |
| 97 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 98 | default CONFIG_HAVE_OPTION_TABLE=1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 99 | |
| 100 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 101 | ## Move the default coreboot cmos range off of AMD RTC registers |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 102 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 103 | default CONFIG_LB_CKS_RANGE_START=49 |
| 104 | default CONFIG_LB_CKS_RANGE_END=122 |
| 105 | default CONFIG_LB_CKS_LOC=123 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 106 | |
| 107 | ## |
| 108 | ## Build code for SMP support |
| 109 | ## Only worry about 2 micro processors |
| 110 | ## |
| 111 | default CONFIG_SMP=1 |
| 112 | default CONFIG_MAX_CPUS=4 |
| 113 | default CONFIG_LOGICAL_CPUS=0 |
| 114 | |
| 115 | ## |
| 116 | ## Build code to setup a generic IOAPIC |
| 117 | ## |
| 118 | default CONFIG_IOAPIC=1 |
| 119 | |
| 120 | ## |
| 121 | ## Clean up the motherboard id strings |
| 122 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 123 | default CONFIG_MAINBOARD_PART_NUMBER="X6DHR" |
| 124 | default CONFIG_MAINBOARD_VENDOR= "Supermicro" |
| 125 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x15D9 |
| 126 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x5580 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 127 | |
| 128 | ### |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 129 | ### coreboot layout values |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 130 | ### |
| 131 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 132 | ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. |
| 133 | default CONFIG_ROM_IMAGE_SIZE = 65536 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 134 | |
| 135 | ## |
| 136 | ## Use a small 8K stack |
| 137 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 138 | default CONFIG_STACK_SIZE=0x2000 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 139 | |
| 140 | ## |
| 141 | ## Use a small 32K heap |
| 142 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 143 | default CONFIG_HEAP_SIZE=0x8000 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 144 | |
| 145 | |
| 146 | ### |
| 147 | ### Compute the location and size of where this firmware image |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 148 | ### (coreboot plus bootloader) will live in the boot rom chip. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 149 | ### |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 150 | default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 151 | |
| 152 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 153 | ## Coreboot C code runs at this location in RAM |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 154 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 155 | default CONFIG_RAMBASE=0x00004000 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 156 | |
| 157 | ## |
| 158 | ## Load the payload from the ROM |
| 159 | ## |
Ed Swierk | be13dc7 | 2006-12-15 12:56:28 +0000 | [diff] [blame] | 160 | default CONFIG_ROM_PAYLOAD=1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 161 | |
| 162 | |
| 163 | ### |
| 164 | ### Defaults of options that you may want to override in the target config file |
| 165 | ### |
| 166 | |
| 167 | ## |
| 168 | ## The default compiler |
| 169 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 170 | default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 171 | default HOSTCC="gcc" |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 172 | |
| 173 | ## |
| 174 | ## Disable the gdb stub by default |
| 175 | ## |
| 176 | default CONFIG_GDB_STUB=0 |
| 177 | |
| 178 | ## |
| 179 | ## The Serial Console |
| 180 | ## |
| 181 | |
| 182 | # To Enable the Serial Console |
| 183 | default CONFIG_CONSOLE_SERIAL8250=1 |
| 184 | |
| 185 | ## Select the serial console baud rate |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 186 | default CONFIG_TTYS0_BAUD=115200 |
| 187 | #default CONFIG_TTYS0_BAUD=57600 |
| 188 | #default CONFIG_TTYS0_BAUD=38400 |
| 189 | #default CONFIG_TTYS0_BAUD=19200 |
| 190 | #default CONFIG_TTYS0_BAUD=9600 |
| 191 | #default CONFIG_TTYS0_BAUD=4800 |
| 192 | #default CONFIG_TTYS0_BAUD=2400 |
| 193 | #default CONFIG_TTYS0_BAUD=1200 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 194 | |
| 195 | # Select the serial console base port |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 196 | default CONFIG_TTYS0_BASE=0x3f8 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 197 | |
| 198 | # Select the serial protocol |
| 199 | # This defaults to 8 data bits, 1 stop bit, and no parity |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 200 | default CONFIG_TTYS0_LCS=0x3 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 201 | |
| 202 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 203 | ### Select the coreboot loglevel |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 204 | ## |
| 205 | ## EMERG 1 system is unusable |
| 206 | ## ALERT 2 action must be taken immediately |
| 207 | ## CRIT 3 critical conditions |
| 208 | ## ERR 4 error conditions |
| 209 | ## WARNING 5 warning conditions |
| 210 | ## NOTICE 6 normal but significant condition |
| 211 | ## INFO 7 informational |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 212 | ## CONFIG_DEBUG 8 debug-level messages |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 213 | ## SPEW 9 Way too many details |
| 214 | |
| 215 | ## Request this level of debugging output |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 216 | default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 217 | ## At a maximum only compile in this level of debugging |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 218 | default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 219 | |
| 220 | ## |
| 221 | ## Select power on after power fail setting |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 222 | default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 223 | |
| 224 | ## |
| 225 | ## Don't enable the btext console |
| 226 | ## |
| 227 | default CONFIG_CONSOLE_BTEXT=0 |
| 228 | |
| 229 | |
| 230 | ### End Options.lb |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 231 | # |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 232 | # CBFS |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 233 | # |
| 234 | # |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 235 | default CONFIG_CBFS=1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 236 | end |