Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1 | ## |
| 2 | ## Only use the option table in a normal image |
| 3 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 4 | default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 5 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 6 | ## CONFIG_XIP_ROM_SIZE must be a power of 2. |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 7 | default CONFIG_XIP_ROM_SIZE = 64 * 1024 |
Carl-Daniel Hailfinger | cff071a | 2009-06-06 16:50:38 +0000 | [diff] [blame] | 8 | include /config/nofailovercalculation.lb |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 9 | |
| 10 | ## |
| 11 | ## Set all of the defaults for an x86 architecture |
| 12 | ## |
| 13 | |
| 14 | arch i386 end |
| 15 | |
| 16 | ## |
| 17 | ## Build the objects we have code for in this directory. |
| 18 | ## |
| 19 | |
| 20 | driver mainboard.o |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 21 | if CONFIG_HAVE_MP_TABLE object mptable.o end |
| 22 | if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 23 | object reset.o |
| 24 | |
| 25 | ## |
| 26 | ## Romcc output |
| 27 | ## |
| 28 | makerule ./failover.E |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 29 | depends "$(CONFIG_MAINBOARD)/failover.c ../romcc" |
| 30 | action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/failover.c -o $@" |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 31 | end |
| 32 | |
| 33 | makerule ./failover.inc |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 34 | depends "$(CONFIG_MAINBOARD)/failover.c ../romcc" |
| 35 | action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/failover.c -o $@" |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 36 | end |
| 37 | |
| 38 | makerule ./auto.E |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 39 | depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc" |
| 40 | action "../romcc -E -mcpu=p4 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@" |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 41 | end |
| 42 | makerule ./auto.inc |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 43 | depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc" |
| 44 | action "../romcc -mcpu=p4 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@" |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 45 | end |
| 46 | |
| 47 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 48 | ## Build our 16 bit and 32 bit coreboot entry code |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 49 | ## |
| 50 | mainboardinit cpu/x86/16bit/entry16.inc |
| 51 | mainboardinit cpu/x86/32bit/entry32.inc |
| 52 | ldscript /cpu/x86/16bit/entry16.lds |
| 53 | ldscript /cpu/x86/32bit/entry32.lds |
| 54 | |
| 55 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 56 | ## Build our reset vector (This is where coreboot is entered) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 57 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 58 | if CONFIG_USE_FALLBACK_IMAGE |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 59 | mainboardinit cpu/x86/16bit/reset16.inc |
| 60 | ldscript /cpu/x86/16bit/reset16.lds |
| 61 | else |
| 62 | mainboardinit cpu/x86/32bit/reset32.inc |
| 63 | ldscript /cpu/x86/32bit/reset32.lds |
| 64 | end |
| 65 | |
| 66 | ### Should this be in the northbridge code? |
| 67 | mainboardinit arch/i386/lib/cpu_reset.inc |
| 68 | |
| 69 | ## |
| 70 | ## Include an id string (For safe flashing) |
| 71 | ## |
| 72 | mainboardinit arch/i386/lib/id.inc |
| 73 | ldscript /arch/i386/lib/id.lds |
| 74 | |
| 75 | ### |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 76 | ### This is the early phase of coreboot startup |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 77 | ### Things are delicate and we test to see if we should |
| 78 | ### failover to another image. |
| 79 | ### |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 80 | if CONFIG_USE_FALLBACK_IMAGE |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 81 | ldscript /arch/i386/lib/failover.lds |
| 82 | mainboardinit ./failover.inc |
| 83 | end |
| 84 | |
| 85 | ### |
| 86 | ### O.k. We aren't just an intermediary anymore! |
| 87 | ### |
| 88 | |
| 89 | ## |
| 90 | ## Setup RAM |
| 91 | ## |
| 92 | mainboardinit cpu/x86/fpu/enable_fpu.inc |
| 93 | mainboardinit cpu/x86/mmx/enable_mmx.inc |
| 94 | mainboardinit cpu/x86/sse/enable_sse.inc |
| 95 | mainboardinit ./auto.inc |
| 96 | mainboardinit cpu/x86/sse/disable_sse.inc |
| 97 | mainboardinit cpu/x86/mmx/disable_mmx.inc |
| 98 | |
| 99 | ## |
| 100 | ## Include the secondary Configuration files |
| 101 | ## |
| 102 | dir /pc80 |
| 103 | config chip.h |
| 104 | |
Uwe Hermann | 586470c | 2006-10-27 11:38:22 +0000 | [diff] [blame] | 105 | chip northbridge/intel/e7525 # mch |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 106 | device pci_domain 0 on |
| 107 | chip southbridge/intel/esb6300 # esb6300 |
| 108 | register "pirq_a_d" = "0x0b0a0a05" |
| 109 | register "pirq_e_h" = "0x0a0b0c80" |
| 110 | |
| 111 | device pci 1c.0 on end |
| 112 | |
| 113 | device pci 1d.0 on end |
| 114 | device pci 1d.1 on end |
| 115 | device pci 1d.4 on end |
| 116 | device pci 1d.5 on end |
| 117 | device pci 1d.7 on end |
| 118 | |
| 119 | device pci 1e.0 on end |
| 120 | |
| 121 | device pci 1f.0 on |
| 122 | chip superio/winbond/w83627hf |
| 123 | device pnp 2e.0 off end |
| 124 | device pnp 2e.1 off end |
| 125 | device pnp 2e.2 on |
| 126 | io 0x60 = 0x3f8 |
| 127 | irq 0x70 = 4 |
| 128 | end |
| 129 | device pnp 2e.3 on |
| 130 | io 0x60 = 0x2f8 |
| 131 | irq 0x70 = 3 |
| 132 | end |
| 133 | device pnp 2e.4 off end |
| 134 | device pnp 2e.5 off end |
| 135 | device pnp 2e.6 off end |
| 136 | device pnp 2e.7 off end |
| 137 | device pnp 2e.9 off end |
| 138 | device pnp 2e.a on end |
| 139 | device pnp 2e.b off end |
| 140 | device pnp 2e.f off end |
| 141 | device pnp 2e.10 off end |
| 142 | device pnp 2e.14 off end |
| 143 | end |
| 144 | end |
| 145 | device pci 1f.1 on end |
| 146 | device pci 1f.2 on end |
| 147 | device pci 1f.3 on end |
| 148 | device pci 1f.5 off end |
| 149 | device pci 1f.6 on end |
| 150 | end |
| 151 | device pci 00.0 on end |
| 152 | device pci 00.1 on end |
| 153 | device pci 00.2 on end |
| 154 | device pci 02.0 on end |
| 155 | device pci 03.0 on end |
| 156 | device pci 04.0 on end |
| 157 | device pci 08.0 on end |
| 158 | end |
| 159 | device apic_cluster 0 on |
Stefan Reinauer | 953253f | 2009-04-22 08:56:50 +0000 | [diff] [blame] | 160 | chip cpu/intel/socket_mPGA604 # cpu0 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 161 | device apic 0 on end |
| 162 | end |
Stefan Reinauer | 953253f | 2009-04-22 08:56:50 +0000 | [diff] [blame] | 163 | chip cpu/intel/socket_mPGA604 # cpu1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 164 | device apic 6 on end |
| 165 | end |
| 166 | end |
| 167 | end |
| 168 | |