Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 1 | uses CONFIG_HAVE_MP_TABLE |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 2 | uses CONFIG_CBFS |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 3 | uses CONFIG_HAVE_PIRQ_TABLE |
| 4 | uses CONFIG_USE_FALLBACK_IMAGE |
| 5 | uses CONFIG_HAVE_FALLBACK_BOOT |
| 6 | uses CONFIG_HAVE_HARD_RESET |
| 7 | uses CONFIG_IRQ_SLOT_COUNT |
| 8 | uses CONFIG_HAVE_OPTION_TABLE |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 9 | uses CONFIG_MAX_CPUS |
| 10 | uses CONFIG_MAX_PHYSICAL_CPUS |
| 11 | uses CONFIG_LOGICAL_CPUS |
| 12 | uses CONFIG_IOAPIC |
| 13 | uses CONFIG_SMP |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 14 | uses CONFIG_FALLBACK_SIZE |
| 15 | uses CONFIG_ROM_SIZE |
| 16 | uses CONFIG_ROM_SECTION_SIZE |
| 17 | uses CONFIG_ROM_IMAGE_SIZE |
| 18 | uses CONFIG_ROM_SECTION_SIZE |
| 19 | uses CONFIG_ROM_SECTION_OFFSET |
Ed Swierk | be13dc7 | 2006-12-15 12:56:28 +0000 | [diff] [blame] | 20 | uses CONFIG_ROM_PAYLOAD |
| 21 | uses CONFIG_ROM_PAYLOAD_START |
Ed Swierk | 1a7a5b4 | 2006-12-15 11:42:16 +0000 | [diff] [blame] | 22 | uses CONFIG_COMPRESSED_PAYLOAD_LZMA |
Myles Watson | 15674b7 | 2007-12-09 17:18:29 +0000 | [diff] [blame] | 23 | uses CONFIG_PRECOMPRESSED_PAYLOAD |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 24 | uses CONFIG_PAYLOAD_SIZE |
| 25 | uses CONFIG_ROMBASE |
| 26 | uses CONFIG_XIP_ROM_SIZE |
| 27 | uses CONFIG_XIP_ROM_BASE |
| 28 | uses CONFIG_STACK_SIZE |
| 29 | uses CONFIG_HEAP_SIZE |
| 30 | uses CONFIG_USE_OPTION_TABLE |
| 31 | uses CONFIG_LB_CKS_RANGE_START |
| 32 | uses CONFIG_LB_CKS_RANGE_END |
| 33 | uses CONFIG_LB_CKS_LOC |
| 34 | uses CONFIG_MAINBOARD |
| 35 | uses CONFIG_MAINBOARD_PART_NUMBER |
| 36 | uses CONFIG_MAINBOARD_VENDOR |
| 37 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID |
| 38 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 39 | uses COREBOOT_EXTRA_VERSION |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 40 | uses CONFIG_RAMBASE |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 41 | uses CONFIG_GDB_STUB |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 42 | uses CONFIG_CROSS_COMPILE |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 43 | uses CC |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 44 | uses HOSTCC |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 45 | uses CONFIG_OBJCOPY |
| 46 | uses CONFIG_TTYS0_BAUD |
| 47 | uses CONFIG_TTYS0_BASE |
| 48 | uses CONFIG_TTYS0_LCS |
| 49 | uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL |
| 50 | uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL |
| 51 | uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 52 | uses CONFIG_CONSOLE_SERIAL8250 |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 53 | uses CONFIG_HAVE_INIT_TIMER |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 54 | uses CONFIG_GDB_STUB |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 55 | uses CONFIG_CONSOLE_VGA |
| 56 | uses CONFIG_PCI_ROM_RUN |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 57 | uses CONFIG_HW_MEM_HOLE_SIZEK |
| 58 | uses CONFIG_K8_HT_FREQ_1G_SUPPORT |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 59 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 60 | uses CONFIG_USE_DCACHE_RAM |
| 61 | uses CONFIG_DCACHE_RAM_BASE |
| 62 | uses CONFIG_DCACHE_RAM_SIZE |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 63 | uses CONFIG_USE_INIT |
Carl-Daniel Hailfinger | 93159bf | 2008-12-22 09:53:24 +0000 | [diff] [blame] | 64 | uses CONFIG_USE_PRINTK_IN_CAR |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 65 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 66 | uses CONFIG_ENABLE_APIC_EXT_ID |
| 67 | uses CONFIG_APIC_ID_OFFSET |
| 68 | uses CONFIG_LIFT_BSP_APIC_ID |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 69 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 70 | uses CONFIG_HT_CHAIN_UNITID_BASE |
| 71 | uses CONFIG_HT_CHAIN_END_UNITID_BASE |
| 72 | uses CONFIG_SB_HT_CHAIN_ON_BUS0 |
| 73 | uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 74 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 75 | ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use. |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 76 | #512K bytes |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 77 | #default CONFIG_ROM_SIZE=524288 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 78 | |
| 79 | #1M bytes |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 80 | default CONFIG_ROM_SIZE=1048576 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 81 | |
| 82 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 83 | ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 84 | ## |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 85 | default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 86 | |
| 87 | ### |
| 88 | ### Build options |
| 89 | ### |
| 90 | |
| 91 | ## |
| 92 | ## Build code for the fallback boot |
| 93 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 94 | default CONFIG_HAVE_FALLBACK_BOOT=1 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 95 | |
| 96 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 97 | ## Build code to reset the motherboard from coreboot |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 98 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 99 | default CONFIG_HAVE_HARD_RESET=1 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 100 | |
| 101 | ## |
| 102 | ## Build code to export a programmable irq routing table |
| 103 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 104 | default CONFIG_HAVE_PIRQ_TABLE=1 |
| 105 | default CONFIG_IRQ_SLOT_COUNT=11 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 106 | |
| 107 | ## |
| 108 | ## Build code to export an x86 MP table |
| 109 | ## Useful for specifying IRQ routing values |
| 110 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 111 | default CONFIG_HAVE_MP_TABLE=1 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 112 | |
| 113 | ## |
| 114 | ## Build code to export a CMOS option table |
| 115 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 116 | default CONFIG_HAVE_OPTION_TABLE=1 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 117 | |
| 118 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 119 | ## Move the default coreboot cmos range off of AMD RTC registers |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 120 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 121 | default CONFIG_LB_CKS_RANGE_START=49 |
| 122 | default CONFIG_LB_CKS_RANGE_END=122 |
| 123 | default CONFIG_LB_CKS_LOC=123 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 124 | |
| 125 | ## |
| 126 | ## Build code for SMP support |
| 127 | ## Only worry about 2 micro processors |
| 128 | ## |
| 129 | default CONFIG_SMP=1 |
| 130 | default CONFIG_MAX_CPUS=4 |
| 131 | default CONFIG_MAX_PHYSICAL_CPUS=2 |
| 132 | default CONFIG_LOGICAL_CPUS=1 |
| 133 | |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 134 | #1G memory hole |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 135 | default CONFIG_HW_MEM_HOLE_SIZEK=0x100000 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 136 | |
| 137 | #Opteron K8 1G HT Support |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 138 | default CONFIG_K8_HT_FREQ_1G_SUPPORT=1 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 139 | |
| 140 | ##HT Unit ID offset, default is 1, the typical one |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 141 | default CONFIG_HT_CHAIN_UNITID_BASE=0x0 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 142 | |
| 143 | ##real SB Unit ID, default is 0x20, mean dont touch it at last |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 144 | #default CONFIG_HT_CHAIN_END_UNITID_BASE=0x0 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 145 | |
| 146 | #make the SB HT chain on bus 0, default is not (0) |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 147 | default CONFIG_SB_HT_CHAIN_ON_BUS0=2 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 148 | |
| 149 | ##only offset for SB chain?, default is yes(1) |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 150 | default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=0 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 151 | |
| 152 | #VGA |
| 153 | default CONFIG_CONSOLE_VGA=1 |
| 154 | default CONFIG_PCI_ROM_RUN=1 |
| 155 | |
| 156 | ## |
| 157 | ## enable CACHE_AS_RAM specifics |
| 158 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 159 | default CONFIG_USE_DCACHE_RAM=1 |
| 160 | default CONFIG_DCACHE_RAM_BASE=0xcf000 |
| 161 | default CONFIG_DCACHE_RAM_SIZE=0x1000 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 162 | default CONFIG_USE_INIT=0 |
| 163 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 164 | default CONFIG_ENABLE_APIC_EXT_ID=1 |
| 165 | default CONFIG_APIC_ID_OFFSET=0x10 |
| 166 | default CONFIG_LIFT_BSP_APIC_ID=0 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 167 | |
| 168 | |
| 169 | ## |
| 170 | ## Build code to setup a generic IOAPIC |
| 171 | ## |
| 172 | default CONFIG_IOAPIC=1 |
| 173 | |
| 174 | ## |
| 175 | ## Clean up the motherboard id strings |
| 176 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 177 | default CONFIG_MAINBOARD_PART_NUMBER="ultra40" |
| 178 | default CONFIG_MAINBOARD_VENDOR="sunw" |
Ronald G. Minnich | 08af3f5 | 2006-08-09 02:21:49 +0000 | [diff] [blame] | 179 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 180 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x108e |
| 181 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x40 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 182 | |
| 183 | ### |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 184 | ### coreboot layout values |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 185 | ### |
| 186 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 187 | ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. |
| 188 | default CONFIG_ROM_IMAGE_SIZE = 65536 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 189 | |
| 190 | ## |
| 191 | ## Use a small 8K stack |
| 192 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 193 | default CONFIG_STACK_SIZE=0x2000 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 194 | |
| 195 | ## |
| 196 | ## Use a small 16K heap |
| 197 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 198 | default CONFIG_HEAP_SIZE=0x4000 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 199 | |
| 200 | ## |
| 201 | ## Only use the option table in a normal image |
| 202 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 203 | default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 204 | |
| 205 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 206 | ## Coreboot C code runs at this location in RAM |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 207 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 208 | default CONFIG_RAMBASE=0x00004000 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 209 | |
| 210 | ## |
| 211 | ## Load the payload from the ROM |
| 212 | ## |
Ed Swierk | be13dc7 | 2006-12-15 12:56:28 +0000 | [diff] [blame] | 213 | default CONFIG_ROM_PAYLOAD = 1 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 214 | |
| 215 | ### |
| 216 | ### Defaults of options that you may want to override in the target config file |
| 217 | ### |
| 218 | |
| 219 | ## |
| 220 | ## The default compiler |
| 221 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 222 | default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 223 | default HOSTCC="gcc" |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 224 | |
| 225 | ## |
| 226 | ## Disable the gdb stub by default |
| 227 | ## |
| 228 | default CONFIG_GDB_STUB=0 |
| 229 | |
Carl-Daniel Hailfinger | 93159bf | 2008-12-22 09:53:24 +0000 | [diff] [blame] | 230 | default CONFIG_USE_PRINTK_IN_CAR=1 |
| 231 | |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 232 | ## |
| 233 | ## The Serial Console |
| 234 | ## |
| 235 | |
| 236 | # To Enable the Serial Console |
| 237 | default CONFIG_CONSOLE_SERIAL8250=1 |
| 238 | |
| 239 | ## Select the serial console baud rate |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 240 | default CONFIG_TTYS0_BAUD=115200 |
| 241 | #default CONFIG_TTYS0_BAUD=57600 |
| 242 | #default CONFIG_TTYS0_BAUD=38400 |
| 243 | #default CONFIG_TTYS0_BAUD=19200 |
| 244 | #default CONFIG_TTYS0_BAUD=9600 |
| 245 | #default CONFIG_TTYS0_BAUD=4800 |
| 246 | #default CONFIG_TTYS0_BAUD=2400 |
| 247 | #default CONFIG_TTYS0_BAUD=1200 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 248 | |
| 249 | # Select the serial console base port |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 250 | default CONFIG_TTYS0_BASE=0x3f8 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 251 | |
| 252 | # Select the serial protocol |
| 253 | # This defaults to 8 data bits, 1 stop bit, and no parity |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 254 | default CONFIG_TTYS0_LCS=0x3 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 255 | |
| 256 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 257 | ### Select the coreboot loglevel |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 258 | ## |
| 259 | ## EMERG 1 system is unusable |
| 260 | ## ALERT 2 action must be taken immediately |
| 261 | ## CRIT 3 critical conditions |
| 262 | ## ERR 4 error conditions |
| 263 | ## WARNING 5 warning conditions |
| 264 | ## NOTICE 6 normal but significant condition |
| 265 | ## INFO 7 informational |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 266 | ## CONFIG_DEBUG 8 debug-level messages |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 267 | ## SPEW 9 Way too many details |
| 268 | |
| 269 | ## Request this level of debugging output |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 270 | default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 271 | ## At a maximum only compile in this level of debugging |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 272 | default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 273 | |
| 274 | ## |
| 275 | ## Select power on after power fail setting |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 276 | default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 277 | |
| 278 | ### End Options.lb |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 279 | # |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 280 | # CBFS |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 281 | # |
| 282 | # |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 283 | default CONFIG_CBFS=1 |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 284 | end |