bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 1 | ## |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | ## This file is part of the coreboot project. |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 3 | ## |
| 4 | ## Copyright (C) 2006 AMD |
| 5 | ## Written by Yinghai Lu <yinghailu@gmail.com> for AMD. |
| 6 | ## |
| 7 | ## Copyright (C) 2006 MSI |
| 8 | ## Written by bxshi <bingxunshi@gmail.com> for MSI. |
| 9 | ## |
| 10 | ## This program is free software; you can redistribute it and/or modify |
| 11 | ## it under the terms of the GNU General Public License as published by |
| 12 | ## the Free Software Foundation; either version 2 of the License, or |
| 13 | ## (at your option) any later version. |
| 14 | ## |
| 15 | ## This program is distributed in the hope that it will be useful, |
| 16 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | ## GNU General Public License for more details. |
| 19 | ## |
| 20 | ## You should have received a copy of the GNU General Public License |
| 21 | ## along with this program; if not, write to the Free Software |
| 22 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 23 | ## |
| 24 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 25 | uses CONFIG_HAVE_MP_TABLE |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 26 | uses CONFIG_CBFS |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 27 | uses CONFIG_HAVE_PIRQ_TABLE |
| 28 | uses CONFIG_HAVE_ACPI_TABLES |
| 29 | uses CONFIG_HAVE_ACPI_RESUME |
| 30 | uses CONFIG_ACPI_SSDTX_NUM |
| 31 | uses CONFIG_USE_FALLBACK_IMAGE |
| 32 | uses CONFIG_HAVE_FALLBACK_BOOT |
| 33 | uses CONFIG_HAVE_HARD_RESET |
| 34 | uses CONFIG_IRQ_SLOT_COUNT |
| 35 | uses CONFIG_HAVE_OPTION_TABLE |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 36 | uses CONFIG_MAX_CPUS |
| 37 | uses CONFIG_MAX_PHYSICAL_CPUS |
| 38 | uses CONFIG_LOGICAL_CPUS |
| 39 | uses CONFIG_IOAPIC |
| 40 | uses CONFIG_SMP |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 41 | uses CONFIG_FALLBACK_SIZE |
| 42 | uses CONFIG_ROM_SIZE |
| 43 | uses CONFIG_ROM_SECTION_SIZE |
| 44 | uses CONFIG_ROM_IMAGE_SIZE |
| 45 | uses CONFIG_ROM_SECTION_SIZE |
| 46 | uses CONFIG_ROM_SECTION_OFFSET |
Ed Swierk | be13dc7 | 2006-12-15 12:56:28 +0000 | [diff] [blame] | 47 | uses CONFIG_ROM_PAYLOAD |
| 48 | uses CONFIG_ROM_PAYLOAD_START |
Ed Swierk | 1a7a5b4 | 2006-12-15 11:42:16 +0000 | [diff] [blame] | 49 | uses CONFIG_COMPRESSED_PAYLOAD_LZMA |
Myles Watson | 15674b7 | 2007-12-09 17:18:29 +0000 | [diff] [blame] | 50 | uses CONFIG_PRECOMPRESSED_PAYLOAD |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 51 | uses CONFIG_PAYLOAD_SIZE |
| 52 | uses CONFIG_ROMBASE |
| 53 | uses CONFIG_XIP_ROM_SIZE |
| 54 | uses CONFIG_XIP_ROM_BASE |
| 55 | uses CONFIG_STACK_SIZE |
| 56 | uses CONFIG_HEAP_SIZE |
| 57 | uses CONFIG_USE_OPTION_TABLE |
| 58 | uses CONFIG_LB_CKS_RANGE_START |
| 59 | uses CONFIG_LB_CKS_RANGE_END |
| 60 | uses CONFIG_LB_CKS_LOC |
| 61 | uses CONFIG_MAINBOARD_PART_NUMBER |
| 62 | uses CONFIG_MAINBOARD_VENDOR |
| 63 | uses CONFIG_MAINBOARD |
| 64 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID |
| 65 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 66 | uses COREBOOT_EXTRA_VERSION |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 67 | uses CONFIG_RAMBASE |
| 68 | uses CONFIG_TTYS0_BAUD |
| 69 | uses CONFIG_TTYS0_BASE |
| 70 | uses CONFIG_TTYS0_LCS |
| 71 | uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL |
| 72 | uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL |
| 73 | uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 74 | uses CONFIG_CONSOLE_SERIAL8250 |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 75 | uses CONFIG_HAVE_INIT_TIMER |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 76 | uses CONFIG_GDB_STUB |
| 77 | uses CONFIG_GDB_STUB |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 78 | uses CONFIG_CROSS_COMPILE |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 79 | uses CC |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 80 | uses HOSTCC |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 81 | uses CONFIG_OBJCOPY |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 82 | uses CONFIG_CONSOLE_VGA |
| 83 | uses CONFIG_PCI_ROM_RUN |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 84 | uses CONFIG_HW_MEM_HOLE_SIZEK |
| 85 | uses CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC |
| 86 | uses CONFIG_K8_HT_FREQ_1G_SUPPORT |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 87 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 88 | uses CONFIG_HT_CHAIN_UNITID_BASE |
| 89 | uses CONFIG_HT_CHAIN_END_UNITID_BASE |
| 90 | uses CONFIG_SB_HT_CHAIN_ON_BUS0 |
| 91 | uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 92 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 93 | uses CONFIG_USE_DCACHE_RAM |
| 94 | uses CONFIG_DCACHE_RAM_BASE |
| 95 | uses CONFIG_DCACHE_RAM_SIZE |
| 96 | uses CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 97 | uses CONFIG_USE_INIT |
| 98 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 99 | uses CONFIG_SERIAL_CPU_INIT |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 100 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 101 | uses CONFIG_ENABLE_APIC_EXT_ID |
| 102 | uses CONFIG_APIC_ID_OFFSET |
| 103 | uses CONFIG_LIFT_BSP_APIC_ID |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 104 | |
| 105 | uses CONFIG_PCI_64BIT_PREF_MEM |
| 106 | |
| 107 | uses CONFIG_LB_MEM_TOPK |
Marc Jones | 2080bd9 | 2008-09-29 22:59:23 +0000 | [diff] [blame] | 108 | uses CONFIG_USE_PRINTK_IN_CAR |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 109 | |
| 110 | ### |
| 111 | ### Build options |
| 112 | ### |
| 113 | |
| 114 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 115 | ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use. |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 116 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 117 | default CONFIG_ROM_SIZE=524288 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 118 | |
| 119 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 120 | ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 121 | default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 122 | |
| 123 | #more 1M for pgtbl |
| 124 | default CONFIG_LB_MEM_TOPK=2048 |
| 125 | |
| 126 | ## |
| 127 | ## Build code for the fallback boot |
| 128 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 129 | default CONFIG_HAVE_FALLBACK_BOOT=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 130 | |
| 131 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 132 | ## Build code to reset the motherboard from coreboot |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 133 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 134 | default CONFIG_HAVE_HARD_RESET=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 135 | |
| 136 | ## |
| 137 | ## Build code to export a programmable irq routing table |
| 138 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 139 | default CONFIG_HAVE_PIRQ_TABLE=1 |
| 140 | default CONFIG_IRQ_SLOT_COUNT=11 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 141 | |
| 142 | ## |
| 143 | ## Build code to export an x86 MP table |
| 144 | ## Useful for specifying IRQ routing values |
| 145 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 146 | default CONFIG_HAVE_MP_TABLE=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 147 | |
| 148 | ## ACPI tables will be included |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 149 | #default CONFIG_HAVE_ACPI_TABLES=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 150 | ## extra SSDT num |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 151 | #default CONFIG_ACPI_SSDTX_NUM=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 152 | |
| 153 | ## |
| 154 | ## Build code to export a CMOS option table |
| 155 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 156 | default CONFIG_HAVE_OPTION_TABLE=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 157 | |
| 158 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 159 | ## Move the default coreboot cmos range off of AMD RTC registers |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 160 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 161 | default CONFIG_LB_CKS_RANGE_START=49 |
| 162 | default CONFIG_LB_CKS_RANGE_END=122 |
| 163 | default CONFIG_LB_CKS_LOC=123 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 164 | |
| 165 | ## |
| 166 | ## Build code for SMP support |
| 167 | ## Only worry about 2 micro processors |
| 168 | ## |
| 169 | default CONFIG_SMP=1 |
| 170 | default CONFIG_MAX_CPUS=4 |
| 171 | default CONFIG_MAX_PHYSICAL_CPUS=2 |
| 172 | default CONFIG_LOGICAL_CPUS=1 |
| 173 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 174 | default CONFIG_SERIAL_CPU_INIT=0 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 175 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 176 | default CONFIG_ENABLE_APIC_EXT_ID=0 |
| 177 | default CONFIG_APIC_ID_OFFSET=0x8 |
| 178 | default CONFIG_LIFT_BSP_APIC_ID=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 179 | |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 180 | #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. |
| 181 | #2G |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 182 | #default CONFIG_HW_MEM_HOLE_SIZEK=0x200000 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 183 | #1G |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 184 | default CONFIG_HW_MEM_HOLE_SIZEK=0x100000 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 185 | #512M |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 186 | #default CONFIG_HW_MEM_HOLE_SIZEK=0x80000 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 187 | |
| 188 | #make auto increase hole size to avoid hole_startk equal to basek so as to make some kernel happy |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 189 | #default CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 190 | |
| 191 | #Opteron K8 1G HT Support |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 192 | default CONFIG_K8_HT_FREQ_1G_SUPPORT=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 193 | |
| 194 | #VGA Console |
| 195 | default CONFIG_CONSOLE_VGA=1 |
| 196 | default CONFIG_PCI_ROM_RUN=1 |
| 197 | |
| 198 | #HT Unit ID offset, default is 1, the typical one |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 199 | default CONFIG_HT_CHAIN_UNITID_BASE=0x06 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 200 | |
| 201 | #real SB Unit ID, default is 0x20, mean dont touch it at last |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 202 | default CONFIG_HT_CHAIN_END_UNITID_BASE=0x01 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 203 | |
| 204 | #make the SB HT chain on bus 0, default is not (0) |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 205 | default CONFIG_SB_HT_CHAIN_ON_BUS0=2 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 206 | |
| 207 | #only offset for SB chain?, default is yes(1) |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 208 | #default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=0 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 209 | |
| 210 | #allow capable device use that above 4G |
| 211 | #default CONFIG_PCI_64BIT_PREF_MEM=1 |
| 212 | |
| 213 | ## |
| 214 | ## enable CACHE_AS_RAM specifics |
| 215 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 216 | default CONFIG_USE_DCACHE_RAM=1 |
| 217 | default CONFIG_DCACHE_RAM_BASE=0xcc000 |
| 218 | default CONFIG_DCACHE_RAM_SIZE=0x04000 |
| 219 | default CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000 |
Stefan Reinauer | 88e71e8 | 2009-05-02 12:42:30 +0000 | [diff] [blame] | 220 | default CONFIG_USE_INIT=0 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 221 | |
| 222 | ## |
| 223 | ## Build code to setup a generic IOAPIC |
| 224 | ## |
| 225 | default CONFIG_IOAPIC=1 |
| 226 | |
| 227 | ## |
| 228 | ## Clean up the motherboard id strings |
| 229 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 230 | default CONFIG_MAINBOARD_PART_NUMBER="MS9185" |
| 231 | default CONFIG_MAINBOARD_VENDOR="MSI" |
| 232 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x1022 |
| 233 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 234 | |
| 235 | ### |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 236 | ### coreboot layout values |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 237 | ### |
| 238 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 239 | ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. |
| 240 | default CONFIG_ROM_IMAGE_SIZE = 65536 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 241 | |
| 242 | ## |
| 243 | ## Use a small 8K stack |
| 244 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 245 | default CONFIG_STACK_SIZE=0x2000 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 246 | |
| 247 | ## |
| 248 | ## Use a small 32K heap |
| 249 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 250 | default CONFIG_HEAP_SIZE=0x8000 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 251 | |
| 252 | ## |
| 253 | ## Only use the option table in a normal image |
| 254 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 255 | default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 256 | |
| 257 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 258 | ## Coreboot C code runs at this location in RAM |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 259 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 260 | default CONFIG_RAMBASE=0x00100000 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 261 | |
| 262 | ## |
| 263 | ## Load the payload from the ROM |
| 264 | ## |
Ed Swierk | be13dc7 | 2006-12-15 12:56:28 +0000 | [diff] [blame] | 265 | default CONFIG_ROM_PAYLOAD = 1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 266 | |
| 267 | ### |
| 268 | ### Defaults of options that you may want to override in the target config file |
| 269 | ### |
| 270 | |
| 271 | ## |
| 272 | ## The default compiler |
| 273 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 274 | default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 275 | default HOSTCC="gcc" |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 276 | |
| 277 | ## |
| 278 | ## Disable the gdb stub by default |
| 279 | ## |
| 280 | default CONFIG_GDB_STUB=0 |
| 281 | |
| 282 | ## |
| 283 | ## The Serial Console |
| 284 | ## |
Marc Jones | 2080bd9 | 2008-09-29 22:59:23 +0000 | [diff] [blame] | 285 | default CONFIG_USE_PRINTK_IN_CAR=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 286 | |
| 287 | # To Enable the Serial Console |
| 288 | default CONFIG_CONSOLE_SERIAL8250=1 |
| 289 | |
| 290 | ## Select the serial console baud rate |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 291 | default CONFIG_TTYS0_BAUD=115200 |
| 292 | #default CONFIG_TTYS0_BAUD=57600 |
| 293 | #default CONFIG_TTYS0_BAUD=38400 |
| 294 | #default CONFIG_TTYS0_BAUD=19200 |
| 295 | #default CONFIG_TTYS0_BAUD=9600 |
| 296 | #default CONFIG_TTYS0_BAUD=4800 |
| 297 | #default CONFIG_TTYS0_BAUD=2400 |
| 298 | #default CONFIG_TTYS0_BAUD=1200 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 299 | |
| 300 | # Select the serial console base port |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 301 | default CONFIG_TTYS0_BASE=0x3f8 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 302 | |
| 303 | # Select the serial protocol |
| 304 | # This defaults to 8 data bits, 1 stop bit, and no parity |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 305 | default CONFIG_TTYS0_LCS=0x3 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 306 | |
| 307 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 308 | ### Select the coreboot loglevel |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 309 | ## |
| 310 | ## EMERG 1 system is unusable |
| 311 | ## ALERT 2 action must be taken immediately |
| 312 | ## CRIT 3 critical conditions |
| 313 | ## ERR 4 error conditions |
| 314 | ## WARNING 5 warning conditions |
| 315 | ## NOTICE 6 normal but significant condition |
| 316 | ## INFO 7 informational |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 317 | ## CONFIG_DEBUG 8 debug-level messages |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 318 | ## SPEW 9 Way too many details |
| 319 | |
| 320 | ## Request this level of debugging output |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 321 | default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 322 | ## At a maximum only compile in this level of debugging |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 323 | default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 324 | |
| 325 | ## |
| 326 | ## Select power on after power fail setting |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 327 | default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 328 | |
| 329 | ### End Options.lb |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 330 | # |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 331 | # CBFS |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 332 | # |
| 333 | # |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 334 | default CONFIG_CBFS=1 |
bxshi | faea4c5 | 2006-11-02 16:02:33 +0000 | [diff] [blame] | 335 | end |