Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2008 Arastra, Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License version 2 as |
| 8 | ## published by the Free Software Foundation. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | ## |
| 19 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 20 | uses CONFIG_HAVE_MP_TABLE |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 21 | uses CONFIG_CBFS |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 22 | uses CONFIG_HAVE_PIRQ_TABLE |
| 23 | uses CONFIG_USE_FALLBACK_IMAGE |
| 24 | uses CONFIG_HAVE_FALLBACK_BOOT |
| 25 | uses CONFIG_HAVE_HARD_RESET |
| 26 | uses CONFIG_IRQ_SLOT_COUNT |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 27 | uses CONFIG_LOGICAL_CPUS |
| 28 | uses CONFIG_MAX_CPUS |
| 29 | uses CONFIG_IOAPIC |
| 30 | uses CONFIG_SMP |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 31 | uses CONFIG_FALLBACK_SIZE |
| 32 | uses CONFIG_ROM_SIZE |
| 33 | uses CONFIG_ROM_SECTION_SIZE |
| 34 | uses CONFIG_ROM_IMAGE_SIZE |
| 35 | uses CONFIG_ROM_SECTION_SIZE |
| 36 | uses CONFIG_ROM_SECTION_OFFSET |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 37 | uses CONFIG_ROM_PAYLOAD |
| 38 | uses CONFIG_ROM_PAYLOAD_START |
| 39 | uses CONFIG_COMPRESSED_PAYLOAD_LZMA |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 40 | uses CONFIG_PAYLOAD_SIZE |
| 41 | uses CONFIG_ROMBASE |
| 42 | uses CONFIG_XIP_ROM_SIZE |
| 43 | uses CONFIG_XIP_ROM_BASE |
| 44 | uses CONFIG_STACK_SIZE |
| 45 | uses CONFIG_HEAP_SIZE |
| 46 | uses CONFIG_LB_CKS_RANGE_START |
| 47 | uses CONFIG_LB_CKS_RANGE_END |
| 48 | uses CONFIG_LB_CKS_LOC |
| 49 | uses CONFIG_MAINBOARD |
| 50 | uses CONFIG_MAINBOARD_PART_NUMBER |
| 51 | uses CONFIG_MAINBOARD_VENDOR |
| 52 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID |
| 53 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 54 | uses COREBOOT_EXTRA_VERSION |
| 55 | uses CONFIG_UDELAY_TSC |
| 56 | uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 57 | uses CONFIG_RAMBASE |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 58 | uses CONFIG_GDB_STUB |
| 59 | uses CONFIG_CONSOLE_SERIAL8250 |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 60 | uses CONFIG_TTYS0_BAUD |
| 61 | uses CONFIG_TTYS0_BASE |
| 62 | uses CONFIG_TTYS0_LCS |
| 63 | uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL |
| 64 | uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL |
| 65 | uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 66 | uses CC |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 67 | uses HOSTCC |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 68 | uses CONFIG_CROSS_COMPILE |
| 69 | uses CONFIG_OBJCOPY |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 70 | |
| 71 | |
| 72 | ### |
| 73 | ### Build options |
| 74 | ### |
| 75 | |
| 76 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 77 | ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use. |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 78 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 79 | default CONFIG_ROM_SIZE = 2 * 1024 * 1024 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 80 | |
| 81 | ## |
| 82 | ## Build code for the fallback boot |
| 83 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 84 | default CONFIG_HAVE_FALLBACK_BOOT=1 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 85 | |
| 86 | ## |
| 87 | ## Delay timer options |
| 88 | ## Use timer2 |
| 89 | ## |
| 90 | default CONFIG_UDELAY_TSC=1 |
| 91 | default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 |
| 92 | |
| 93 | ## |
| 94 | ## Build code to reset the motherboard from coreboot |
| 95 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 96 | default CONFIG_HAVE_HARD_RESET=1 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 97 | |
| 98 | ## |
| 99 | ## Build code to export a programmable irq routing table |
| 100 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 101 | default CONFIG_HAVE_PIRQ_TABLE=1 |
| 102 | default CONFIG_IRQ_SLOT_COUNT=1 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 103 | |
| 104 | ## |
| 105 | ## Build code to export an x86 MP table |
| 106 | ## Useful for specifying IRQ routing values |
| 107 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 108 | default CONFIG_HAVE_MP_TABLE=1 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 109 | |
| 110 | ## |
| 111 | ## Build code for SMP support |
| 112 | ## Only worry about 2 micro processors |
| 113 | ## |
| 114 | default CONFIG_SMP=1 |
| 115 | default CONFIG_MAX_CPUS=4 |
| 116 | default CONFIG_LOGICAL_CPUS=0 |
| 117 | |
| 118 | ## |
| 119 | ## Build code to setup a generic IOAPIC |
| 120 | ## |
| 121 | default CONFIG_IOAPIC=1 |
| 122 | |
| 123 | ## |
| 124 | ## Clean up the motherboard id strings |
| 125 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 126 | default CONFIG_MAINBOARD_PART_NUMBER="Truxton" |
| 127 | default CONFIG_MAINBOARD_VENDOR= "Intel" |
| 128 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x8086 |
| 129 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2680 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 130 | |
| 131 | ### |
| 132 | ### Coreboot layout values |
| 133 | ### |
| 134 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 135 | ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. |
| 136 | default CONFIG_ROM_IMAGE_SIZE = 65536 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 137 | |
| 138 | ## |
| 139 | ## Use a small 8K stack |
| 140 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 141 | default CONFIG_STACK_SIZE=0x2000 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 142 | |
| 143 | ## |
| 144 | ## Use a small 32K heap |
| 145 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 146 | default CONFIG_HEAP_SIZE=0x8000 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 147 | |
| 148 | |
| 149 | ### |
| 150 | ### Compute the location and size of where this firmware image |
| 151 | ### (coreboot plus bootloader) will live in the boot rom chip. |
| 152 | ### |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 153 | default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 154 | |
| 155 | ## |
| 156 | ## coreboot C code runs at this location in RAM |
| 157 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 158 | default CONFIG_RAMBASE=0x00004000 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 159 | |
| 160 | ## |
| 161 | ## Load the payload from the ROM |
| 162 | ## |
| 163 | default CONFIG_ROM_PAYLOAD=1 |
| 164 | |
| 165 | |
| 166 | ### |
| 167 | ### Defaults of options that you may want to override in the target config file |
| 168 | ### |
| 169 | |
| 170 | ## |
| 171 | ## The default compiler |
| 172 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 173 | default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 174 | default HOSTCC="gcc" |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 175 | |
| 176 | ## |
| 177 | ## Disable the gdb stub by default |
| 178 | ## |
| 179 | default CONFIG_GDB_STUB=0 |
| 180 | |
| 181 | ## |
| 182 | ## The Serial Console |
| 183 | ## |
| 184 | |
| 185 | # To Enable the Serial Console |
| 186 | default CONFIG_CONSOLE_SERIAL8250=1 |
| 187 | |
| 188 | ## Select the serial console baud rate |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 189 | default CONFIG_TTYS0_BAUD=115200 |
| 190 | #default CONFIG_TTYS0_BAUD=57600 |
| 191 | #default CONFIG_TTYS0_BAUD=38400 |
| 192 | #default CONFIG_TTYS0_BAUD=19200 |
| 193 | #default CONFIG_TTYS0_BAUD=9600 |
| 194 | #default CONFIG_TTYS0_BAUD=4800 |
| 195 | #default CONFIG_TTYS0_BAUD=2400 |
| 196 | #default CONFIG_TTYS0_BAUD=1200 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 197 | |
| 198 | # Select the serial console base port |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 199 | default CONFIG_TTYS0_BASE=0x3f8 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 200 | |
| 201 | # Select the serial protocol |
| 202 | # This defaults to 8 data bits, 1 stop bit, and no parity |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 203 | default CONFIG_TTYS0_LCS=0x3 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 204 | |
| 205 | ## |
| 206 | ### Select the coreboot loglevel |
| 207 | ## |
| 208 | ## EMERG 1 system is unusable |
| 209 | ## ALERT 2 action must be taken immediately |
| 210 | ## CRIT 3 critical conditions |
| 211 | ## ERR 4 error conditions |
| 212 | ## WARNING 5 warning conditions |
| 213 | ## NOTICE 6 normal but significant condition |
| 214 | ## INFO 7 informational |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 215 | ## CONFIG_DEBUG 8 debug-level messages |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 216 | ## SPEW 9 way too many details |
| 217 | |
| 218 | ## Request this level of debugging output |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 219 | default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 220 | ## At a maximum only compile in this level of debugging |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 221 | default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=5 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 222 | |
| 223 | ## |
| 224 | ## Select power on after power fail setting |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 225 | default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 226 | |
| 227 | ### End Options.lb |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 228 | |
| 229 | |
| 230 | # |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 231 | # CBFS |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 232 | # |
| 233 | # |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 234 | default CONFIG_CBFS=1 |
Ed Swierk | b8e53eb | 2008-10-13 23:18:56 +0000 | [diff] [blame] | 235 | end |