Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 1 | uses CONFIG_HAVE_MP_TABLE |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 2 | uses CONFIG_CBFS |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 3 | uses CONFIG_HAVE_PIRQ_TABLE |
| 4 | uses CONFIG_USE_FALLBACK_IMAGE |
| 5 | uses CONFIG_HAVE_FALLBACK_BOOT |
| 6 | uses CONFIG_HAVE_HARD_RESET |
| 7 | uses CONFIG_IRQ_SLOT_COUNT |
| 8 | uses CONFIG_HAVE_OPTION_TABLE |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 9 | uses CONFIG_MAX_CPUS |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 10 | uses CONFIG_MAX_PHYSICAL_CPUS |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 11 | uses CONFIG_IOAPIC |
| 12 | uses CONFIG_SMP |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 13 | uses CONFIG_FALLBACK_SIZE |
| 14 | uses CONFIG_ROM_SIZE |
| 15 | uses CONFIG_ROM_SECTION_SIZE |
| 16 | uses CONFIG_ROM_IMAGE_SIZE |
| 17 | uses CONFIG_ROM_SECTION_SIZE |
| 18 | uses CONFIG_ROM_SECTION_OFFSET |
Ed Swierk | be13dc7 | 2006-12-15 12:56:28 +0000 | [diff] [blame] | 19 | uses CONFIG_ROM_PAYLOAD |
| 20 | uses CONFIG_ROM_PAYLOAD_START |
Ed Swierk | 1a7a5b4 | 2006-12-15 11:42:16 +0000 | [diff] [blame] | 21 | uses CONFIG_COMPRESSED_PAYLOAD_LZMA |
Myles Watson | 15674b7 | 2007-12-09 17:18:29 +0000 | [diff] [blame] | 22 | uses CONFIG_PRECOMPRESSED_PAYLOAD |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 23 | uses CONFIG_PAYLOAD_SIZE |
| 24 | uses CONFIG_ROMBASE |
| 25 | uses CONFIG_XIP_ROM_SIZE |
| 26 | uses CONFIG_XIP_ROM_BASE |
| 27 | uses CONFIG_STACK_SIZE |
| 28 | uses CONFIG_HEAP_SIZE |
| 29 | uses CONFIG_USE_OPTION_TABLE |
| 30 | uses CONFIG_LB_CKS_RANGE_START |
| 31 | uses CONFIG_LB_CKS_RANGE_END |
| 32 | uses CONFIG_LB_CKS_LOC |
| 33 | uses CONFIG_MAINBOARD |
| 34 | uses CONFIG_MAINBOARD_PART_NUMBER |
| 35 | uses CONFIG_MAINBOARD_VENDOR |
| 36 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID |
| 37 | uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 38 | uses COREBOOT_EXTRA_VERSION |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 39 | uses CONFIG_RAMBASE |
| 40 | uses CONFIG_TTYS0_BAUD |
| 41 | uses CONFIG_TTYS0_BASE |
| 42 | uses CONFIG_TTYS0_LCS |
| 43 | uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL |
| 44 | uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL |
| 45 | uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 46 | uses CONFIG_CONSOLE_SERIAL8250 |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 47 | uses CONFIG_HAVE_INIT_TIMER |
Eric Biederman | f8a2ddd | 2004-10-30 08:05:41 +0000 | [diff] [blame] | 48 | uses CONFIG_GDB_STUB |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 49 | uses CONFIG_CROSS_COMPILE |
Eric Biederman | 709850a | 2004-11-05 10:48:04 +0000 | [diff] [blame] | 50 | uses CC |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 51 | uses HOSTCC |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 52 | uses CONFIG_OBJCOPY |
arch import user (historical) | 8fb9a5a | 2005-07-06 17:16:03 +0000 | [diff] [blame] | 53 | uses CONFIG_CONSOLE_VGA |
| 54 | uses CONFIG_PCI_ROM_RUN |
Jason Schildt | a922bac | 2005-10-25 21:33:00 +0000 | [diff] [blame] | 55 | uses CONFIG_LOGICAL_CPUS |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 56 | uses CONFIG_USE_DCACHE_RAM |
| 57 | uses CONFIG_DCACHE_RAM_BASE |
| 58 | uses CONFIG_DCACHE_RAM_SIZE |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 59 | uses CONFIG_USE_INIT |
Carl-Daniel Hailfinger | 93159bf | 2008-12-22 09:53:24 +0000 | [diff] [blame] | 60 | uses CONFIG_USE_PRINTK_IN_CAR |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 61 | |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 62 | ### |
| 63 | ### Build options |
| 64 | ### |
| 65 | |
| 66 | ## |
Jason Schildt | a922bac | 2005-10-25 21:33:00 +0000 | [diff] [blame] | 67 | ## CONFIG_LOGICAL_CPUS enables dual core support |
| 68 | ## |
| 69 | default CONFIG_LOGICAL_CPUS=1 |
| 70 | |
| 71 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 72 | ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use. |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 73 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 74 | default CONFIG_ROM_SIZE=524288 |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 75 | |
| 76 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 77 | ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 78 | ## |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 79 | default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 80 | |
| 81 | ## |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 82 | ## Build code for the fallback boot |
| 83 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 84 | default CONFIG_HAVE_FALLBACK_BOOT=1 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 85 | |
| 86 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 87 | ## Build code to reset the motherboard from coreboot |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 88 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 89 | default CONFIG_HAVE_HARD_RESET=1 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 90 | |
Eric Biederman | 216525d | 2004-10-16 02:48:37 +0000 | [diff] [blame] | 91 | ## |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 92 | ## Build code to export a programmable irq routing table |
| 93 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 94 | default CONFIG_HAVE_PIRQ_TABLE=1 |
| 95 | default CONFIG_IRQ_SLOT_COUNT=9 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 96 | |
| 97 | ## |
| 98 | ## Build code to export an x86 MP table |
| 99 | ## Useful for specifying IRQ routing values |
| 100 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 101 | default CONFIG_HAVE_MP_TABLE=1 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 102 | |
| 103 | ## |
| 104 | ## Build code to export a CMOS option table |
| 105 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 106 | default CONFIG_HAVE_OPTION_TABLE=1 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 107 | |
| 108 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 109 | ## Move the default coreboot cmos range off of AMD RTC registers |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 110 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 111 | default CONFIG_LB_CKS_RANGE_START=49 |
| 112 | default CONFIG_LB_CKS_RANGE_END=122 |
| 113 | default CONFIG_LB_CKS_LOC=123 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 114 | |
| 115 | ## |
| 116 | ## Build code for SMP support |
| 117 | ## Only worry about 2 micro processors |
| 118 | ## |
| 119 | default CONFIG_SMP=1 |
Jason Schildt | a922bac | 2005-10-25 21:33:00 +0000 | [diff] [blame] | 120 | default CONFIG_MAX_CPUS=4 |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 121 | default CONFIG_MAX_PHYSICAL_CPUS=2 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 122 | |
| 123 | ## |
| 124 | ## Build code to setup a generic IOAPIC |
| 125 | ## |
| 126 | default CONFIG_IOAPIC=1 |
| 127 | |
Stefan Reinauer | bc3f2f0 | 2007-11-02 11:06:40 +0000 | [diff] [blame] | 128 | ## |
| 129 | ## enable CACHE_AS_RAM specifics |
| 130 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 131 | default CONFIG_USE_DCACHE_RAM=1 |
| 132 | default CONFIG_DCACHE_RAM_BASE=0xcf000 |
| 133 | default CONFIG_DCACHE_RAM_SIZE=0x1000 |
Stefan Reinauer | bc3f2f0 | 2007-11-02 11:06:40 +0000 | [diff] [blame] | 134 | default CONFIG_USE_INIT=0 |
| 135 | |
arch import user (historical) | 8fb9a5a | 2005-07-06 17:16:03 +0000 | [diff] [blame] | 136 | #VGA |
| 137 | default CONFIG_CONSOLE_VGA=1 |
| 138 | default CONFIG_PCI_ROM_RUN=1 |
| 139 | |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 140 | ## |
| 141 | ## Clean up the motherboard id strings |
| 142 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 143 | default CONFIG_MAINBOARD_PART_NUMBER="HDAMA" |
| 144 | default CONFIG_MAINBOARD_VENDOR="ARIMA" |
| 145 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x161f |
| 146 | default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x3016 |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 147 | |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 148 | |
| 149 | ### |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 150 | ### coreboot layout values |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 151 | ### |
| 152 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 153 | ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. |
| 154 | default CONFIG_ROM_IMAGE_SIZE = 65536 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 155 | |
| 156 | ## |
| 157 | ## Use a small 8K stack |
| 158 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 159 | default CONFIG_STACK_SIZE=0x2000 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 160 | |
| 161 | ## |
| 162 | ## Use a small 16K heap |
| 163 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 164 | default CONFIG_HEAP_SIZE=0x4000 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 165 | |
| 166 | ## |
| 167 | ## Only use the option table in a normal image |
| 168 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 169 | default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 170 | |
| 171 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 172 | ## Coreboot C code runs at this location in RAM |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 173 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 174 | default CONFIG_RAMBASE=0x00004000 |
Eric Biederman | 216525d | 2004-10-16 02:48:37 +0000 | [diff] [blame] | 175 | |
| 176 | ## |
| 177 | ## Load the payload from the ROM |
| 178 | ## |
Ed Swierk | be13dc7 | 2006-12-15 12:56:28 +0000 | [diff] [blame] | 179 | default CONFIG_ROM_PAYLOAD = 1 |
Eric Biederman | 216525d | 2004-10-16 02:48:37 +0000 | [diff] [blame] | 180 | |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 181 | ### |
| 182 | ### Defaults of options that you may want to override in the target config file |
| 183 | ### |
Eric Biederman | 216525d | 2004-10-16 02:48:37 +0000 | [diff] [blame] | 184 | |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 185 | ## |
| 186 | ## The default compiler |
| 187 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 188 | default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" |
Stefan Reinauer | 9dd27bc | 2009-06-30 17:13:58 +0000 | [diff] [blame] | 189 | default HOSTCC="gcc" |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 190 | |
| 191 | ## |
Eric Biederman | f8a2ddd | 2004-10-30 08:05:41 +0000 | [diff] [blame] | 192 | ## Disable the gdb stub by default |
| 193 | ## |
| 194 | default CONFIG_GDB_STUB=0 |
| 195 | |
Carl-Daniel Hailfinger | 93159bf | 2008-12-22 09:53:24 +0000 | [diff] [blame] | 196 | default CONFIG_USE_PRINTK_IN_CAR=1 |
| 197 | |
Eric Biederman | f8a2ddd | 2004-10-30 08:05:41 +0000 | [diff] [blame] | 198 | ## |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 199 | ## The Serial Console |
| 200 | ## |
| 201 | |
| 202 | # To Enable the Serial Console |
| 203 | default CONFIG_CONSOLE_SERIAL8250=1 |
| 204 | |
| 205 | ## Select the serial console baud rate |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 206 | default CONFIG_TTYS0_BAUD=115200 |
| 207 | #default CONFIG_TTYS0_BAUD=57600 |
| 208 | #default CONFIG_TTYS0_BAUD=38400 |
| 209 | #default CONFIG_TTYS0_BAUD=19200 |
| 210 | #default CONFIG_TTYS0_BAUD=9600 |
| 211 | #default CONFIG_TTYS0_BAUD=4800 |
| 212 | #default CONFIG_TTYS0_BAUD=2400 |
| 213 | #default CONFIG_TTYS0_BAUD=1200 |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 214 | |
| 215 | # Select the serial console base port |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 216 | default CONFIG_TTYS0_BASE=0x3f8 |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 217 | |
| 218 | # Select the serial protocol |
| 219 | # This defaults to 8 data bits, 1 stop bit, and no parity |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 220 | default CONFIG_TTYS0_LCS=0x3 |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 221 | |
| 222 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 223 | ### Select the coreboot loglevel |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 224 | ## |
| 225 | ## EMERG 1 system is unusable |
| 226 | ## ALERT 2 action must be taken immediately |
| 227 | ## CRIT 3 critical conditions |
| 228 | ## ERR 4 error conditions |
| 229 | ## WARNING 5 warning conditions |
| 230 | ## NOTICE 6 normal but significant condition |
| 231 | ## INFO 7 informational |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 232 | ## CONFIG_DEBUG 8 debug-level messages |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 233 | ## SPEW 9 Way too many details |
| 234 | |
| 235 | ## Request this level of debugging output |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 236 | default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 237 | ## At a maximum only compile in this level of debugging |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 238 | default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 239 | |
| 240 | ## |
| 241 | ## Select power on after power fail setting |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 242 | default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 243 | |
| 244 | ### End Options.lb |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 245 | # |
Peter Stuge | 483b7bb | 2009-04-14 07:40:01 +0000 | [diff] [blame] | 246 | # CBFS |
Ronald G. Minnich | d469cda | 2009-03-31 16:32:01 +0000 | [diff] [blame] | 247 | # |
| 248 | # |
Patrick Georgi | b339e10 | 2009-08-11 17:35:02 +0000 | [diff] [blame^] | 249 | default CONFIG_CBFS=1 |
Ronald G. Minnich | 4b93394 | 2004-10-14 21:40:58 +0000 | [diff] [blame] | 250 | end |