blob: 27d9ec759482b76b1ddf653d0bb679a5ce7894d1 [file] [log] [blame]
Patrick Georgi02363b52020-05-05 20:48:50 +02001/* This file is part of the coreboot project. */
Tristan Corrick44095c12018-12-22 00:04:18 +13002/*
Tristan Corrick44095c12018-12-22 00:04:18 +13003 *
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <console/console.h>
16#include <device/device.h>
Tristan Corrick44095c12018-12-22 00:04:18 +130017#include <option.h>
18#include <stdint.h>
19#include <types.h>
20
21/*
22 * Hiding the AST2400 might be desirable to reduce attack surface.
23 *
24 * The PCIe root port that the AST2400 is on is disabled, but the
25 * AST2400 itself likely remains in an enabled state.
26 *
27 * The AST2400 is also attached to the LPC. That interface does not get
28 * disabled.
29 */
30static void hide_ast2400(void)
31{
Elyes HAOUASd2abe932019-01-23 14:18:34 +010032 struct device *dev = pcidev_on_root(0x1c, 0);
Tristan Corrick44095c12018-12-22 00:04:18 +130033 if (!dev)
34 return;
35
36 /*
37 * Marking this device as disabled means that the southbridge code
38 * will properly disable the root port when it configures it later.
39 */
40 dev->enabled = 0;
41 printk(BIOS_INFO, "The AST2400 is now set to be hidden.\n");
42}
43
44static void mainboard_enable(struct device *dev)
45{
46 u8 hide = 0;
47
48 if (get_option(&hide, "hide_ast2400") == CB_SUCCESS && hide)
49 hide_ast2400();
50}
51
52struct chip_operations mainboard_ops = {
53 CHIP_NAME("X10SLM+-F")
54 .enable_dev = mainboard_enable,
55};