blob: dd97fffd5bc1503d1b16408f5a36ecbfeb741b76 [file] [log] [blame]
Stefan Reinauer49428d82013-02-21 15:48:37 -08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include "i915_reg.h"
Ronald G. Minnicha95a13b2013-03-05 17:07:40 -080021#include "drm_dp_helper.h"
22
23/* things that are, strangely, not defined anywhere? */
24#define PCH_PP_UNLOCK 0xabcd0000
25#define WMx_LP_SR_EN (1<<31)
26
27/* Google Link-specific defines */
28/* how many 4096-byte pages do we need for the framebuffer?
29 * There are 32 bits per pixel, or 4 bytes,
30 * which means 1024 pixels per page.
31 * HencetThere are 4250 GTTs on Link:
32 * 2650 (X) * 1700 (Y) pixels / 1024 pixels per page.
33 */
34#define FRAME_BUFFER_PAGES ((2560*1700)/1024)
35#define FRAME_BUFFER_BYTES (FRAME_BUFFER_PAGES*4096)
Stefan Reinauer49428d82013-02-21 15:48:37 -080036
37/* One-letter commands for code not meant to be ready for humans.
38 * The code was generated by a set of programs/scripts.
39 * M print out a kernel message
40 * R read a register. We do these mainly to ensure that if hardware wanted
41 * the register read, it was read; also, in debug, we can see what was expected
42 * and what was found. This has proven *very* useful to get this debugged.
43 * The udelay, if non-zero, will make sure there is a
44 * udelay() call with the value.
45 * The count is from the kernel and tells us how many times this read was done.
46 * Also useful for debugging and the state
47 * machine uses the info to drive a poll.
48 * W Write a register
49 * V set verbosity. It's a bit mask.
50 * 0 -> nothing
51 * 1 -> print kernel messages
52 * 2 -> print IO ops
53 * 4 -> print the number of times we spin on a register in a poll
54 * 8 -> restore whatever the previous verbosity level was
55 * (only one deep stack)
56 *
57 * Again, this is not really meant for human consumption. There is not a poll
58 * operator as such because, sometimes, there is a read/write/read where the
59 * second read is a poll, and this chipset is so touchy I'm reluctant to move
60 * things around and/or delete too many reads.
61 */
62#define M 1
63#define R 2
Ronald G. Minnicha95a13b2013-03-05 17:07:40 -080064#define W 4
65#define V 8
66#define I 16
67#define P 32
Stefan Reinauer49428d82013-02-21 15:48:37 -080068
69struct iodef {
70 unsigned char op;
71 unsigned int count;
72 const char *msg;
73 unsigned long addr;
74 unsigned long data;
75 unsigned long udelay;
76};
Ronald G. Minnich665e3d22013-02-27 09:54:47 -080077
78/* i915.c */
79unsigned long io_i915_READ32(unsigned long addr);
80void io_i915_WRITE32(unsigned long val, unsigned long addr);
81
82/* intel_dp.c */
Ronald G. Minnicha95a13b2013-03-05 17:07:40 -080083u32 pack_aux(u32 *src, int src_bytes);
84void unpack_aux(u32 src, u32 *dst, int dst_bytes);
85int intel_dp_aux_ch(u32 ch_ctl, u32 ch_data, u32 *send, int send_bytes,
86 u32 *recv, int recv_size);
Ronald G. Minnich665e3d22013-02-27 09:54:47 -080087