blob: cd753f42aef02966c4404320aaf3afb5de81d5ad [file] [log] [blame]
Gabe Black396b0722013-09-26 16:22:09 -07001config SOC_NVIDIA_TEGRA124
Daisuke Nojirif574a322014-02-27 14:56:39 -08002 bool
3 default n
Gabe Black2ceb1d82013-10-01 05:24:47 -07004 select ARCH_BOOTBLOCK_ARMV4
Julius Werner86fc11d2015-10-09 13:37:58 -07005 select BOOTBLOCK_CUSTOM
Stefan Reinauer417f16b2015-07-01 16:34:07 -07006 select ARCH_VERSTAGE_ARMV7
Isaac Christensenb7f1bfc2014-08-13 17:29:44 -06007 select ARCH_ROMSTAGE_ARMV7
8 select ARCH_RAMSTAGE_ARMV7
Gabe Blackca436cb2013-09-29 07:06:08 -07009 select HAVE_UART_SPECIAL
Daisuke Nojiri512bfbc2014-08-15 17:07:39 -070010 select HAVE_HARD_RESET
Aaron Durbine5e36302014-09-25 10:05:15 -050011 select HAVE_MONOTONIC_TIMER
12 select GENERIC_UDELAY
Gabe Blackca436cb2013-09-29 07:06:08 -070013 select BOOTBLOCK_CONSOLE
Daisuke Nojirif574a322014-02-27 14:56:39 -080014 select ARM_LPAE
Stefan Reinauer97db1fb2015-03-26 15:58:41 -070015 select GENERIC_GPIO_LIB
Gabe Black396b0722013-09-26 16:22:09 -070016
17if SOC_NVIDIA_TEGRA124
18
Julius Werner58c39382017-02-13 17:53:29 -080019config VBOOT
Julius Werner0a0f9c52016-06-01 14:53:48 -070020 select VBOOT_OPROM_MATTERS
Paul Kocialkowski2d0281c2016-06-27 19:08:59 +020021 select VBOOT_STARTS_IN_BOOTBLOCK
Julius Werner58c39382017-02-13 17:53:29 -080022 select VBOOT_SEPARATE_VERSTAGE
Julius Werner0a0f9c52016-06-01 14:53:48 -070023
Gabe Black31785032014-03-03 16:26:11 -080024config TEGRA124_MODEL_TD570D
25 bool "TD570D"
26
27config TEGRA124_MODEL_TD580D
28 bool "TD580D"
29
30config TEGRA124_MODEL_CD570M
31 bool "CD570M"
32
33config TEGRA124_MODEL_CD580M
34 bool "CD580M"
35
36# Default to 2GHz, the lowest maximum frequency.
37config PLLX_KHZ
38 int
39 default 2000000 if TEGRA124_MODEL_TD570D
40 default 2300000 if TEGRA124_MODEL_TD580D
41 default 2100000 if TEGRA124_MODEL_CD570M
42 default 2300000 if TEGRA124_MODEL_CD580M
43 default 2000000
44
Gabe Black396b0722013-09-26 16:22:09 -070045endif