Angel Pons | fabfe9d | 2020-04-05 15:47:07 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 2 | |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 3 | #include <arch/cpu.h> |
| 4 | #include <device/pci_ops.h> |
| 5 | #include <console/console.h> |
| 6 | #include <cpu/x86/msr.h> |
| 7 | #include <device/pci.h> |
| 8 | #include <device/pci_ids.h> |
| 9 | #include <intelblocks/mp_init.h> |
| 10 | #include <soc/bootblock.h> |
| 11 | #include <soc/pch.h> |
| 12 | #include <soc/pci_devs.h> |
| 13 | #include <string.h> |
| 14 | |
| 15 | #define BIOS_SIGN_ID 0x8B |
| 16 | |
| 17 | static struct { |
| 18 | u32 cpuid; |
| 19 | const char *name; |
| 20 | } cpu_table[] = { |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 21 | { CPUID_JASPERLAKE_A0, "Jasperlake A0" }, |
| 22 | }; |
| 23 | |
| 24 | static struct { |
| 25 | u16 mchid; |
| 26 | const char *name; |
| 27 | } mch_table[] = { |
Maulik V Vaghela | 8745a27 | 2020-04-22 12:13:40 +0530 | [diff] [blame] | 28 | { PCI_DEVICE_ID_INTEL_JSL_ID_1, "Jasperlake SKU4-1" }, |
| 29 | { PCI_DEVICE_ID_INTEL_JSL_ID_2, "Jasperlake SKU4-2" }, |
| 30 | { PCI_DEVICE_ID_INTEL_JSL_ID_3, "Jasperlake SKU2-1" }, |
| 31 | { PCI_DEVICE_ID_INTEL_JSL_ID_4, "Jasperlake SKU2-2" }, |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 32 | }; |
| 33 | |
| 34 | static struct { |
| 35 | u16 espiid; |
| 36 | const char *name; |
| 37 | } pch_table[] = { |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 38 | { PCI_DEVICE_ID_INTEL_JSP_SUPER_ESPI, "Jasperlake Super" }, |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 39 | }; |
| 40 | |
| 41 | static struct { |
| 42 | u16 igdid; |
| 43 | const char *name; |
| 44 | } igd_table[] = { |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 45 | { PCI_DEVICE_ID_INTEL_JSL_GT1, "Jasperlake GT1" }, |
| 46 | { PCI_DEVICE_ID_INTEL_JSL_GT2, "Jasperlake GT2" }, |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 47 | }; |
| 48 | |
| 49 | static inline uint8_t get_dev_revision(pci_devfn_t dev) |
| 50 | { |
| 51 | return pci_read_config8(dev, PCI_REVISION_ID); |
| 52 | } |
| 53 | |
| 54 | static inline uint16_t get_dev_id(pci_devfn_t dev) |
| 55 | { |
| 56 | return pci_read_config16(dev, PCI_DEVICE_ID); |
| 57 | } |
| 58 | |
| 59 | static void report_cpu_info(void) |
| 60 | { |
| 61 | struct cpuid_result cpuidr; |
| 62 | u32 i, index, cpu_id, cpu_feature_flag; |
| 63 | const char cpu_not_found[] = "Platform info not available"; |
| 64 | const char *cpu_name = cpu_not_found; /* 48 bytes are reported */ |
| 65 | int vt, txt, aes; |
| 66 | msr_t microcode_ver; |
| 67 | static const char *const mode[] = {"NOT ", ""}; |
| 68 | const char *cpu_type = "Unknown"; |
| 69 | u32 p[13]; |
| 70 | |
| 71 | index = 0x80000000; |
| 72 | cpuidr = cpuid(index); |
| 73 | if (cpuidr.eax >= 0x80000004) { |
| 74 | int j = 0; |
| 75 | |
| 76 | for (i = 2; i <= 4; i++) { |
| 77 | cpuidr = cpuid(index + i); |
| 78 | p[j++] = cpuidr.eax; |
| 79 | p[j++] = cpuidr.ebx; |
| 80 | p[j++] = cpuidr.ecx; |
| 81 | p[j++] = cpuidr.edx; |
| 82 | } |
| 83 | p[12] = 0; |
| 84 | cpu_name = (char *)p; |
| 85 | |
| 86 | /* Skip leading spaces in CPU name string */ |
| 87 | while (cpu_name[0] == ' ' && strlen(cpu_name) > 0) |
| 88 | cpu_name++; |
| 89 | } |
| 90 | |
| 91 | microcode_ver.lo = 0; |
| 92 | microcode_ver.hi = 0; |
| 93 | wrmsr(BIOS_SIGN_ID, microcode_ver); |
| 94 | cpu_id = cpu_get_cpuid(); |
| 95 | microcode_ver = rdmsr(BIOS_SIGN_ID); |
| 96 | |
| 97 | /* Look for string to match the name */ |
| 98 | for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { |
| 99 | if (cpu_table[i].cpuid == cpu_id) { |
| 100 | cpu_type = cpu_table[i].name; |
| 101 | break; |
| 102 | } |
| 103 | } |
| 104 | |
| 105 | printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); |
| 106 | printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", |
| 107 | cpu_id, cpu_type, microcode_ver.hi); |
| 108 | |
| 109 | cpu_feature_flag = cpu_get_feature_flags_ecx(); |
| 110 | aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; |
| 111 | txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0; |
| 112 | vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0; |
| 113 | printk(BIOS_DEBUG, |
| 114 | "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n", |
| 115 | mode[aes], mode[txt], mode[vt]); |
| 116 | } |
| 117 | |
| 118 | static void report_mch_info(void) |
| 119 | { |
| 120 | int i; |
| 121 | pci_devfn_t dev = SA_DEV_ROOT; |
| 122 | uint16_t mchid = get_dev_id(dev); |
| 123 | uint8_t mch_revision = get_dev_revision(dev); |
| 124 | const char *mch_type = "Unknown"; |
| 125 | |
| 126 | for (i = 0; i < ARRAY_SIZE(mch_table); i++) { |
| 127 | if (mch_table[i].mchid == mchid) { |
| 128 | mch_type = mch_table[i].name; |
| 129 | break; |
| 130 | } |
| 131 | } |
| 132 | |
| 133 | printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n", |
| 134 | mchid, mch_revision, mch_type); |
| 135 | } |
| 136 | |
| 137 | static void report_pch_info(void) |
| 138 | { |
| 139 | int i; |
| 140 | pci_devfn_t dev = PCH_DEV_ESPI; |
| 141 | uint16_t espiid = get_dev_id(dev); |
| 142 | const char *pch_type = "Unknown"; |
| 143 | |
| 144 | for (i = 0; i < ARRAY_SIZE(pch_table); i++) { |
| 145 | if (pch_table[i].espiid == espiid) { |
| 146 | pch_type = pch_table[i].name; |
| 147 | break; |
| 148 | } |
| 149 | } |
| 150 | printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n", |
| 151 | espiid, get_dev_revision(dev), pch_type); |
| 152 | } |
| 153 | |
| 154 | static void report_igd_info(void) |
| 155 | { |
| 156 | int i; |
| 157 | pci_devfn_t dev = SA_DEV_IGD; |
| 158 | uint16_t igdid = get_dev_id(dev); |
| 159 | const char *igd_type = "Unknown"; |
| 160 | |
| 161 | for (i = 0; i < ARRAY_SIZE(igd_table); i++) { |
| 162 | if (igd_table[i].igdid == igdid) { |
| 163 | igd_type = igd_table[i].name; |
| 164 | break; |
| 165 | } |
| 166 | } |
| 167 | printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n", |
| 168 | igdid, get_dev_revision(dev), igd_type); |
| 169 | } |
| 170 | |
| 171 | void report_platform_info(void) |
| 172 | { |
| 173 | report_cpu_info(); |
| 174 | report_mch_info(); |
| 175 | report_pch_info(); |
| 176 | report_igd_info(); |
| 177 | } |