efdesign98 | 95b6611 | 2011-07-20 13:23:04 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
efdesign98 | 95b6611 | 2011-07-20 13:23:04 -0600 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | /* |
| 17 | DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 |
| 18 | ) |
| 19 | { |
| 20 | #include "routing.asl" |
| 21 | } |
| 22 | */ |
| 23 | |
| 24 | /* Routing is in System Bus scope */ |
| 25 | Scope(\_SB) { |
| 26 | Name(PR0, Package(){ |
| 27 | /* NB devices */ |
| 28 | /* Bus 0, Dev 0 - SR5650 HT */ |
| 29 | Package() { 0xFFFF, Zero, INTA, Zero }, |
| 30 | |
| 31 | /* Bus 0, Dev 1 - CLKCONFIG */ |
| 32 | |
| 33 | /* Bus 0, Dev 2 - PCIe Bridge for x16 PCIe Slot */ |
| 34 | Package() {0x0002FFFF, 0, INTE, 0 }, |
| 35 | |
| 36 | /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */ |
| 37 | |
| 38 | /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */ |
| 39 | Package() {0x0004FFFF, 0, INTE, 0 }, |
| 40 | |
| 41 | /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */ |
| 42 | |
| 43 | /* Bus 0, Dev 6 - PCIe Bridge for Ethernet Chip */ |
| 44 | |
| 45 | /* Bus 0, Dev 7 - PCIe Bridge for x1 PCIe Slot */ |
| 46 | |
| 47 | /* Bus 0, Dev 8 - Southbridge port (normally hidden) */ |
| 48 | |
| 49 | /* Bus 0, Dev 9 - PCIe Bridge */ |
| 50 | |
| 51 | /* Bus 0, Dev a - PCIe Bridge */ |
| 52 | |
| 53 | /* Bus 0, Dev b - PCIe Bridge */ |
| 54 | Package() {0x000BFFFF, 0, INTG, 0 }, |
| 55 | |
| 56 | /* Bus 0, Dev c - PCIe Bridge */ |
| 57 | Package() {0x000CFFFF, 0, INTG, 0 }, |
| 58 | |
| 59 | /* Bus 0, Dev d - PCIe Bridge for Intel 82576 Giga NIC*/ |
| 60 | Package() {0x000DFFFF, 0, INTG, 0 }, |
| 61 | |
| 62 | /* SB devices */ |
| 63 | /* Bus 0, Dev 17 - SATA controller */ |
| 64 | Package() {0x0011FFFF, 0, INTG, 0 }, |
| 65 | |
| 66 | /* Bus 0, Dev 19 - USB: OHCI, dev 18,19 func 0-2, dev 20 func 5; |
| 67 | * EHCI, dev 18, 19 func 2 */ |
| 68 | Package() {0x0012FFFF, 0, INTA, 0 }, |
| 69 | Package() {0x0012FFFF, 1, INTB, 0 }, |
| 70 | Package() {0x0012FFFF, 2, INTC, 0 }, |
| 71 | Package() {0x0012FFFF, 3, INTD, 0 }, |
| 72 | |
| 73 | Package() {0x0013FFFF, 0, INTC, 0 }, |
| 74 | Package() {0x0013FFFF, 1, INTD, 0 }, |
| 75 | Package() {0x0013FFFF, 2, INTA, 0 }, |
| 76 | Package() {0x0013FFFF, 2, INTB, 0 }, |
| 77 | |
| 78 | /* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:USB */ |
| 79 | Package(){0x0014FFFF, 0, INTA, 0 }, |
| 80 | Package(){0x0014FFFF, 1, INTB, 0 }, |
| 81 | Package(){0x0014FFFF, 2, INTC, 0 }, |
| 82 | Package(){0x0014FFFF, 3, INTD, 0 }, |
| 83 | }) |
| 84 | |
| 85 | Name(APR0, Package(){ |
| 86 | /* NB devices in APIC mode */ |
| 87 | /* Bus 0, Dev 0 - SR5650 HT */ |
Aladyshev Konstantin | ec3daf7 | 2012-12-18 23:15:55 +0400 | [diff] [blame] | 88 | Package() { 0xFFFF, Zero, Zero, 55 }, |
efdesign98 | 95b6611 | 2011-07-20 13:23:04 -0600 | [diff] [blame] | 89 | |
| 90 | /* Bus 0, Dev 1 - CLKCONFIG */ |
| 91 | |
| 92 | /* Bus 0, Dev 2 - PCIe Bridge for x16 PCIe Slot (GFX0) */ |
| 93 | Package() {0x0002FFFF, 0, 0, 0x34 }, |
| 94 | |
| 95 | /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */ |
| 96 | |
| 97 | /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */ |
| 98 | Package() {0x0004FFFF, 0, 0, 0x34 }, |
| 99 | |
| 100 | /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */ |
| 101 | |
| 102 | /* Bus 0, Dev 6 - General purpose PCIe bridge 6 */ |
| 103 | |
| 104 | /* Bus 0, Dev 7 - PCIe Bridge */ |
| 105 | |
| 106 | /* Bus 0, Dev 8 - Southbridge port (normally hidden) */ |
| 107 | |
| 108 | /* Bus 0, Dev 9 - PCIe Bridge */ |
| 109 | |
| 110 | /* Bus 0, Dev A - PCIe Bridge */ |
| 111 | |
| 112 | /* Bus 0, Dev B - PCIe Bridge */ |
| 113 | Package() {0x000BFFFF, 0, 0, 0x36 }, |
| 114 | |
| 115 | /* Bus 0, Dev C - PCIe Bridge */ |
| 116 | Package() {0x000CFFFF, 0, 0, 0x36 }, |
| 117 | |
| 118 | /* Bus 0, Dev D - PCIe Bridge For Intel 82576 Giga NIC*/ |
| 119 | Package() {0x000DFFFF, 0, 0, 0x36 }, |
| 120 | |
| 121 | /* SB devices in APIC mode */ |
| 122 | /* Bus 0, Dev 17 - SATA controller */ |
| 123 | Package() {0x0011FFFF, 0, 0, 0x16 }, |
| 124 | |
| 125 | /* Bus 0, Dev 19 - USB: OHCI, dev 18,19 func 0-2, dev 20 func 5; |
| 126 | * EHCI, dev 18, 19 func 2 */ |
| 127 | Package( ){0x0012FFFF, 0, 0, 16 }, |
| 128 | Package() {0x0012FFFF, 1, 0, 17 }, |
| 129 | Package() {0x0012FFFF, 2, 0, 18 }, |
| 130 | Package() {0x0012FFFF, 3, 0, 19 }, |
| 131 | |
| 132 | Package() {0x0013FFFF, 0, 0, 18 }, |
| 133 | Package() {0x0013FFFF, 1, 0, 19 }, |
| 134 | Package() {0x0013FFFF, 2, 0, 16 }, |
| 135 | Package() {0x0013FFFF, 3, 0, 17 }, |
| 136 | |
| 137 | /* Bus 0, Dev 20 - F0:SMBus/ACPI, F1:IDE; F2:HDAudio; F3:LPC; F4:PCIBridge; F5:USB */ |
| 138 | Package() {0x0014FFFF, 0, 0, 16 }, |
| 139 | Package() {0x0014FFFF, 1, 0, 17 }, |
| 140 | Package() {0x0014FFFF, 2, 0, 18 }, |
| 141 | Package() {0x0014FFFF, 3, 0, 19 }, |
| 142 | }) |
| 143 | |
| 144 | Name(PS2, Package(){ |
| 145 | /* The external GFX - Hooked to PCIe slot 4 */ |
| 146 | Package() {0x0000FFFF, 0, INTC, 0 }, |
| 147 | Package() {0x0000FFFF, 1, INTD, 0 }, |
| 148 | Package() {0x0000FFFF, 2, INTA, 0 }, |
| 149 | Package() {0x0000FFFF, 3, INTB, 0 }, |
| 150 | }) |
| 151 | Name(APS2, Package(){ |
| 152 | /* The external GFX - Hooked to PCIe slot 4 */ |
| 153 | Package(){0x0000FFFF, 0, 0, 0x18 }, |
| 154 | Package(){0x0000FFFF, 1, 0, 0x19 }, |
| 155 | Package(){0x0000FFFF, 2, 0, 0x1A }, |
| 156 | Package(){0x0000FFFF, 3, 0, 0x1B }, |
| 157 | }) |
| 158 | |
| 159 | Name(PS4, Package(){ |
| 160 | /* PCIe slot - Hooked to PCIe slot 4 */ |
| 161 | Package(){0x0000FFFF, 0, INTA, 0 }, |
| 162 | Package(){0x0000FFFF, 1, INTB, 0 }, |
| 163 | Package(){0x0000FFFF, 2, INTC, 0 }, |
| 164 | Package(){0x0000FFFF, 3, INTD, 0 }, |
| 165 | }) |
| 166 | Name(APS4, Package(){ |
| 167 | /* PCIe slot - Hooked to PCIe slot 4 */ |
| 168 | Package(){0x0000FFFF, 0, 0, 0x2C }, |
| 169 | Package(){0x0000FFFF, 1, 0, 0x2D }, |
| 170 | Package(){0x0000FFFF, 2, 0, 0x2E }, |
| 171 | Package(){0x0000FFFF, 3, 0, 0x2F }, |
| 172 | }) |
| 173 | |
| 174 | Name(PSb, Package(){ |
| 175 | /* PCIe slot - Hooked to PCIe slot 11 */ |
| 176 | Package(){0x0000FFFF, 0, INTD, 0 }, |
| 177 | Package(){0x0000FFFF, 1, INTA, 0 }, |
| 178 | Package(){0x0000FFFF, 2, INTB, 0 }, |
| 179 | Package(){0x0000FFFF, 3, INTC, 0 }, |
| 180 | }) |
| 181 | Name(APSb, Package(){ |
| 182 | /* PCIe slot - Hooked to PCIe */ |
| 183 | Package(){0x0000FFFF, 0, 0, 0x20 }, |
| 184 | Package(){0x0000FFFF, 1, 0, 0x21 }, |
| 185 | Package(){0x0000FFFF, 2, 0, 0x22 }, |
| 186 | Package(){0x0000FFFF, 3, 0, 0x23 }, |
| 187 | }) |
| 188 | |
| 189 | Name(PSc, Package(){ |
| 190 | /* PCIe slot - Hooked to PCIe slot 12 */ |
| 191 | Package(){0x0000FFFF, 0, INTA, 0 }, |
| 192 | Package(){0x0000FFFF, 1, INTB, 0 }, |
| 193 | Package(){0x0000FFFF, 2, INTC, 0 }, |
| 194 | Package(){0x0000FFFF, 3, INTD, 0 }, |
| 195 | }) |
| 196 | Name(APSc, Package(){ |
| 197 | /* PCIe slot - Hooked to PCIe */ |
| 198 | Package(){0x0000FFFF, 0, 0, 0x24 }, |
| 199 | Package(){0x0000FFFF, 1, 0, 0x25 }, |
| 200 | Package(){0x0000FFFF, 2, 0, 0x26 }, |
| 201 | Package(){0x0000FFFF, 3, 0, 0x27 }, |
| 202 | }) |
| 203 | |
| 204 | Name(PSd, Package(){ |
| 205 | /* PCIe slot - Hooked to PCIe slot 13 */ |
| 206 | Package(){0x0000FFFF, 0, INTB, 0 }, |
| 207 | Package(){0x0000FFFF, 1, INTC, 0 }, |
| 208 | Package(){0x0000FFFF, 2, INTD, 0 }, |
| 209 | Package(){0x0000FFFF, 3, INTA, 0 }, |
| 210 | }) |
| 211 | Name(APSd, Package(){ |
| 212 | /* PCIe slot - Hooked to PCIe */ |
| 213 | Package(){0x0000FFFF, 0, 0, 0x28 }, |
| 214 | Package(){0x0000FFFF, 1, 0, 0x29 }, |
| 215 | Package(){0x0000FFFF, 2, 0, 0x2A }, |
| 216 | Package(){0x0000FFFF, 3, 0, 0x2B }, |
| 217 | }) |
| 218 | } |