Patrick Georgi | 021b703 | 2012-11-06 11:05:38 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Patrick Georgi | 021b703 | 2012-11-06 11:05:38 +0100 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | /* This is board specific information: IRQ routing for the |
| 18 | * gm45 |
| 19 | */ |
| 20 | |
| 21 | |
| 22 | // PCI Interrupt Routing |
| 23 | Method(_PRT) |
| 24 | { |
| 25 | If (PICM) { |
| 26 | Return (Package() { |
| 27 | // PCIe Graphics 0:1.0 |
| 28 | Package() { 0x0001ffff, 0, 0, 16 }, |
| 29 | // Onboard graphics (IGD) 0:2.0 |
| 30 | Package() { 0x0002ffff, 0, 0, 16 }, |
| 31 | // USB and EHCI 0:1a.x |
| 32 | Package() { 0x001affff, 0, 0, 16 }, |
| 33 | Package() { 0x001affff, 1, 0, 17 }, |
| 34 | Package() { 0x001affff, 2, 0, 18 }, |
| 35 | // High Definition Audio 0:1b.0 |
| 36 | Package() { 0x001bffff, 0, 0, 16 }, |
| 37 | // PCIe Root Ports 0:1c.x |
| 38 | Package() { 0x001cffff, 0, 0, 16 }, |
| 39 | // USB and EHCI 0:1d.x |
| 40 | Package() { 0x001dffff, 0, 0, 16 }, |
| 41 | Package() { 0x001dffff, 1, 0, 17 }, |
| 42 | Package() { 0x001dffff, 2, 0, 18 }, |
| 43 | // FIXME |
| 44 | // CardBus/IEEE1394 0:1e.2, 0:1e.3 |
| 45 | // Package() { 0x001effff, 0, 0, 22 }, |
| 46 | // Package() { 0x001effff, 1, 0, 20 }, |
| 47 | // LPC device 0:1f.0 |
| 48 | Package() { 0x001fffff, 0, 0, 16 }, |
| 49 | Package() { 0x001fffff, 1, 0, 17 }, |
| 50 | Package() { 0x001fffff, 2, 0, 18 } |
| 51 | }) |
| 52 | } Else { |
| 53 | Return (Package() { |
| 54 | // PCIe Graphics 0:1.0 |
| 55 | Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, |
| 56 | // Onboard graphics (IGD) 0:2.0 |
| 57 | Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, |
| 58 | // USB and EHCI 0:1a.x |
| 59 | Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, |
| 60 | Package() { 0x001affff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, |
| 61 | Package() { 0x001affff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, |
| 62 | // High Definition Audio 0:1b.0 |
| 63 | Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, |
| 64 | // PCIe Root Ports 0:1c.x |
| 65 | Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, |
| 66 | // USB and EHCI 0:1d.x |
| 67 | Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, |
| 68 | Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, |
| 69 | Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, |
| 70 | // FIXME |
| 71 | // CardBus/IEEE1394 0:1e.2, 0:1e.3 |
| 72 | // Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 }, |
| 73 | // Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 }, |
| 74 | // LPC device 0:1f.0 |
| 75 | Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, |
| 76 | Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, |
| 77 | Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKC, 0 } |
| 78 | }) |
| 79 | } |
| 80 | } |