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review.coreboot.org / coreboot / a4ffe8aa4981130b240eee5ed22c5bbfa1c7598b / . / src / console / Kconfig
blob: a2f893a6fc5019c7423fbc3edc7d3acb21466783 [file] [log] [blame]
Stefan Reinauer1b342262011-01-05 02:27:53 +0000[diff] [blame]1menu "Console"
Hung-Te Linad173ea2013-02-06 21:24:12 +0800[diff] [blame]2
Gabe Blackfbb11cf2013-06-06 00:21:20 -0700[diff] [blame]3config BOOTBLOCK_CONSOLE
4 bool "Enable early (bootblock) console output."
Paul Burton6ea3eff2014-06-14 00:04:33 +0100[diff] [blame]5 depends on ARCH_ARM || ARCH_RISCV || ARCH_MIPS
Stefan Reinauerd2f45c62013-06-19 13:42:00 -0700[diff] [blame]6 default n
Gabe Blackfbb11cf2013-06-06 00:21:20 -0700[diff] [blame]7 help
8 Use console during the bootblock if supported
9
Kyösti Mälkki361cd812013-08-12 23:29:57 +0300[diff] [blame]10config SQUELCH_EARLY_SMP
11 bool "Squelch AP CPUs from early console."
12 default y
Kyösti Mälkki361cd812013-08-12 23:29:57 +0300[diff] [blame]13 help
14 When selected only the BSP CPU will output to early console.
15
16 Console drivers have unpredictable behaviour if multiple threads
17 attempt to share the same resources without a spinlock.
18
19 If unsure, say Y.
20
Hung-Te Linad173ea2013-02-06 21:24:12 +0800[diff] [blame]21config CONSOLE_SERIAL
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]22 bool "Serial port console output"
Stefan Reinauer509f7722012-12-07 17:31:37 -0800[diff] [blame]23 default y
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +0200[diff] [blame]24 depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL
Stefan Reinauer509f7722012-12-07 17:31:37 -0800[diff] [blame]25 help
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +0200[diff] [blame]26 Send coreboot debug output to a serial port.
David Hendricks6a503b62012-12-31 17:28:43 -0800[diff] [blame]27
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +0200[diff] [blame]28 The type of serial port driver selected based on your configuration is
29 shown on the following menu line. Supporting multiple different types
30 of UARTs in one build is not supported.
Stefan Reinauer4885daa2011-04-26 23:47:04 +0000[diff] [blame]31
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +0200[diff] [blame]32if CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]33
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +0200[diff] [blame]34 comment "I/O mapped, 8250-compatible"
35 depends on DRIVERS_UART_8250IO
36
37 comment "memory mapped, 8250-compatible"
38 depends on DRIVERS_UART_8250MEM
39
40 comment "device-specific UART"
Hung-Te Linad173ea2013-02-06 21:24:12 +0800[diff] [blame]41 depends on HAVE_UART_SPECIAL
Stefan Reinauer509f7722012-12-07 17:31:37 -0800[diff] [blame]42
Kyösti Mälkki70342a72014-03-14 22:28:29 +0200[diff] [blame]43config UART_FOR_CONSOLE
Kyösti Mälkkid5403772014-05-01 00:02:43 +0300[diff] [blame]44 int "Index for UART port to use for console"
Kyösti Mälkki70342a72014-03-14 22:28:29 +0200[diff] [blame]45 default 0
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]46
Kyösti Mälkki70342a72014-03-14 22:28:29 +0200[diff] [blame]47# FIXME: Early programming in romstage is incorrect as we should
48# program different LDN to actually change the physical port.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]49config TTYS0_BASE
50 hex
Gabe Black77ffa0d2013-09-30 21:25:49 -0700[diff] [blame]51 depends on DRIVERS_UART
Kyösti Mälkki70342a72014-03-14 22:28:29 +0200[diff] [blame]52 default 0x3f8 if UART_FOR_CONSOLE = 0
53 default 0x2f8 if UART_FOR_CONSOLE = 1
54 default 0x3e8 if UART_FOR_CONSOLE = 2
55 default 0x2e8 if UART_FOR_CONSOLE = 3
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]56 help
Kyösti Mälkki70342a72014-03-14 22:28:29 +0200[diff] [blame]57 Map the COM port number to the respective I/O port.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]58
59choice
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000[diff] [blame]60 prompt "Baud rate"
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]61 default CONSOLE_SERIAL_115200
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]62
63config CONSOLE_SERIAL_115200
64 bool "115200"
65 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000[diff] [blame]66 Set serial port Baud rate to 115200.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]67config CONSOLE_SERIAL_57600
68 bool "57600"
69 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000[diff] [blame]70 Set serial port Baud rate to 57600.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]71config CONSOLE_SERIAL_38400
72 bool "38400"
73 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000[diff] [blame]74 Set serial port Baud rate to 38400.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]75config CONSOLE_SERIAL_19200
76 bool "19200"
77 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000[diff] [blame]78 Set serial port Baud rate to 19200.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]79config CONSOLE_SERIAL_9600
80 bool "9600"
81 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000[diff] [blame]82 Set serial port Baud rate to 9600.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]83
84endchoice
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]85
Stefan Reinauer509f7722012-12-07 17:31:37 -0800[diff] [blame]86#FIXME(dhendrix): Change name to SERIAL_BAUD? (Stefan sayz: yes!!)
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]87config TTYS0_BAUD
Uwe Hermannd12b7032009-10-16 22:39:55 +0000[diff] [blame]88 int
89 default 115200 if CONSOLE_SERIAL_115200
90 default 57600 if CONSOLE_SERIAL_57600
91 default 38400 if CONSOLE_SERIAL_38400
92 default 19200 if CONSOLE_SERIAL_19200
93 default 9600 if CONSOLE_SERIAL_9600
94 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000[diff] [blame]95 Map the Baud rates to an integer.
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]96
Uwe Hermann168b11b2009-10-07 16:15:40 +0000[diff] [blame]97# TODO: Allow user-friendly selection of settings other than 8n1.
Patrick Georgi0e9a9252009-10-06 20:48:07 +0000[diff] [blame]98config TTYS0_LCS
99 int
100 default 3
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +0200[diff] [blame]101 depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM
102
103endif # CONSOLE_SERIAL
Patrick Georgi0e9a9252009-10-06 20:48:07 +0000[diff] [blame]104
Vladimir Serbinenko45988da2013-03-30 02:02:13 +0100[diff] [blame]105config SPKMODEM
106 bool "spkmodem (console on speaker) console output"
107 default n
108 help
109 Send coreboot debug output through speaker
110
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200[diff] [blame]111config CONSOLE_USB
112 bool "USB dongle console output"
113 depends on USBDEBUG
Kyösti Mälkki8101aa62013-08-15 16:27:06 +0300[diff] [blame]114 default n
Uwe Hermann168b11b2009-10-07 16:15:40 +0000[diff] [blame]115 help
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200[diff] [blame]116 Send coreboot debug output to USB.
Uwe Hermann168b11b2009-10-07 16:15:40 +0000[diff] [blame]117
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200[diff] [blame]118 Configuration for USB hardware is under menu Generic Drivers.
Kyösti Mälkkid2dac0a2013-08-23 23:33:16 +0300[diff] [blame]119
Uwe Hermann168b11b2009-10-07 16:15:40 +0000[diff] [blame]120# TODO: Deps?
121# TODO: Improve description.
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000[diff] [blame]122config ONBOARD_VGA_IS_PRIMARY
Uwe Hermann168b11b2009-10-07 16:15:40 +0000[diff] [blame]123 bool "Use onboard VGA as primary video device"
Myles Watson45bb25f2009-09-22 18:49:08 +0000[diff] [blame]124 default n
125 help
126 If not selected, the last adapter found will be used.
127
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000[diff] [blame]128config CONSOLE_NE2K
129 bool "Network console over NE2000 compatible Ethernet adapter"
130 default n
131 help
132 Send coreboot debug output to a Ethernet console, it works
133 same way as Linux netconsole, packets are received to UDP
134 port 6666 on IP/MAC specified with options bellow.
135 Use following netcat command: nc -u -l -p 6666
136
137config CONSOLE_NE2K_DST_MAC
138 depends on CONSOLE_NE2K
139 string "Destination MAC address of remote system"
140 default "00:13:d4:76:a2:ac"
141 help
142 Type in either MAC address of logging system or MAC address
143 of the router.
144
145config CONSOLE_NE2K_DST_IP
146 depends on CONSOLE_NE2K
147 string "Destination IP of logging system"
148 default "10.0.1.27"
149 help
Daniele Forsi53847a22014-07-22 18:00:56 +0200[diff] [blame]150 This is IP address of the system running for example
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000[diff] [blame]151 netcat command to dump the packets.
152
153config CONSOLE_NE2K_SRC_IP
154 depends on CONSOLE_NE2K
Stefan Reinauerd6b4f1c2010-09-23 18:29:40 +0000[diff] [blame]155 string "IP address of coreboot system"
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000[diff] [blame]156 default "10.0.1.253"
157 help
Stefan Reinauerd6b4f1c2010-09-23 18:29:40 +0000[diff] [blame]158 This is the IP of the coreboot system
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000[diff] [blame]159
160config CONSOLE_NE2K_IO_PORT
161 depends on CONSOLE_NE2K
162 hex "NE2000 adapter fixed IO port address"
163 default 0xe00
164 help
165 This is the IO port address for the IO port
166 on the card, please select some non-conflicting region,
167 32 bytes of IO spaces will be used (and align on 32 bytes
168 boundary, qemu needs broader align)
169
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700[diff] [blame]170config CONSOLE_CBMEM
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700[diff] [blame]171 bool "Send console output to a CBMEM buffer"
Paul Menzel60ef4562014-03-08 10:46:52 +0100[diff] [blame]172 default y
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700[diff] [blame]173 help
174 Enable this to save the console output in a CBMEM buffer. This would
175 allow to see coreboot console output from Linux space.
176
Kyösti Mälkki8659e402014-12-21 08:55:47 +0200[diff] [blame]177if CONSOLE_CBMEM
178
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700[diff] [blame]179config CONSOLE_CBMEM_BUFFER_SIZE
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700[diff] [blame]180 hex "Room allocated for console output in CBMEM"
Vladimir Serbinenkoeb67a042014-09-13 20:55:58 +0200[diff] [blame]181 default 0x20000
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700[diff] [blame]182 help
183 Space allocated for console output storage in CBMEM. The default
Vladimir Serbinenkoeb67a042014-09-13 20:55:58 +0200[diff] [blame]184 value (128K or 0x20000 bytes) is large enough to accommodate
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700[diff] [blame]185 even the BIOS_SPEW level.
186
Vadim Bendebury6e20e2f2015-04-10 18:04:04 -0700[diff] [blame]187config CONSOLE_CBMEM_DUMP_TO_UART
188 depends on !CONSOLE_SERIAL
189 bool "Dump CBMEM console on resets"
190 default n
191 help
192 Enable this to have CBMEM console buffer contents dumped on the
193 serial output in case serial console is disabled and the device
194 resets itself while trying to boot the payload.
195
Kyösti Mälkki8659e402014-12-21 08:55:47 +0200[diff] [blame]196endif
197
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200[diff] [blame]198config CONSOLE_QEMU_DEBUGCON
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200[diff] [blame]199 bool "QEMU debug console output"
200 depends on BOARD_EMULATION_QEMU_X86
201 default y
202 help
203 Send coreboot debug output to QEMU's isa-debugcon device:
204
205 qemu-system-x86_64 \
206 -chardev file,id=debugcon,path=/dir/file.log \
207 -device isa-debugcon,iobase=0x402,chardev=debugcon
208
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200[diff] [blame]209config CONSOLE_QEMU_DEBUGCON_PORT
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200[diff] [blame]210 hex "QEMU debug console port"
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200[diff] [blame]211 depends on CONSOLE_QEMU_DEBUGCON
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200[diff] [blame]212 default 0x402
213
Martin Roth3a543182015-09-28 15:27:24 -0600[diff] [blame]214config SPI_CONSOLE
215 bool "SPI debug console output"
216 depends on HAVE_SPI_CONSOLE_SUPPORT && !DEBUG_SPI_FLASH
217 help
218 Enable support for the debug console on the Dediprog EM100Pro.
219 This is currently working only in ramstage due to how the spi
220 drivers are written.
221
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]222choice
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]223 prompt "Default console log level"
224 default DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]225
226config DEFAULT_CONSOLE_LOGLEVEL_8
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]227 bool "8: SPEW"
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]228 help
229 Way too many details.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]230config DEFAULT_CONSOLE_LOGLEVEL_7
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]231 bool "7: DEBUG"
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]232 help
233 Debug-level messages.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]234config DEFAULT_CONSOLE_LOGLEVEL_6
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]235 bool "6: INFO"
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]236 help
237 Informational messages.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]238config DEFAULT_CONSOLE_LOGLEVEL_5
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]239 bool "5: NOTICE"
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]240 help
241 Normal but significant conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]242config DEFAULT_CONSOLE_LOGLEVEL_4
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]243 bool "4: WARNING"
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]244 help
245 Warning conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]246config DEFAULT_CONSOLE_LOGLEVEL_3
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]247 bool "3: ERR"
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]248 help
249 Error conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]250config DEFAULT_CONSOLE_LOGLEVEL_2
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]251 bool "2: CRIT"
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]252 help
253 Critical conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]254config DEFAULT_CONSOLE_LOGLEVEL_1
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]255 bool "1: ALERT"
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]256 help
257 Action must be taken immediately.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]258config DEFAULT_CONSOLE_LOGLEVEL_0
Myles Watson03646182009-10-16 19:29:45 +0000[diff] [blame]259 bool "0: EMERG"
260 help
261 System is unusable.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]262
263endchoice
264
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]265config DEFAULT_CONSOLE_LOGLEVEL
Uwe Hermann7fe41912009-10-11 13:35:24 +0000[diff] [blame]266 int
267 default 0 if DEFAULT_CONSOLE_LOGLEVEL_0
268 default 1 if DEFAULT_CONSOLE_LOGLEVEL_1
269 default 2 if DEFAULT_CONSOLE_LOGLEVEL_2
270 default 3 if DEFAULT_CONSOLE_LOGLEVEL_3
271 default 4 if DEFAULT_CONSOLE_LOGLEVEL_4
272 default 5 if DEFAULT_CONSOLE_LOGLEVEL_5
273 default 6 if DEFAULT_CONSOLE_LOGLEVEL_6
274 default 7 if DEFAULT_CONSOLE_LOGLEVEL_7
275 default 8 if DEFAULT_CONSOLE_LOGLEVEL_8
276 help
277 Map the log level config names to an integer.
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]278
Stefan Reinauerc719f1a2010-03-30 09:57:28 +0000[diff] [blame]279config NO_POST
280 bool "Don't show any POST codes"
281 default n
282
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700[diff] [blame]283config CMOS_POST
284 bool "Store post codes in CMOS for debugging"
Stefan Reinauerc2d5a162012-12-06 14:25:27 -0800[diff] [blame]285 depends on !NO_POST && PC80_SYSTEM
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700[diff] [blame]286 default n
287 help
288 If enabled, coreboot will store post codes in CMOS and switch between
289 two offsets on each boot so the last post code in the previous boot
290 can be retrieved. This uses 3 bytes of CMOS.
291
292config CMOS_POST_OFFSET
293 hex "Offset into CMOS to store POST codes"
294 depends on CMOS_POST
295 default 0
296 help
297 If CMOS_POST is enabled then an offset into CMOS must be provided.
298 If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value
299 defined in the mainboard option table.
300
Duncan Lauried5686fe2013-06-10 10:21:41 -0700[diff] [blame]301config CMOS_POST_EXTRA
302 bool "Store extra logging info into CMOS"
303 depends on CMOS_POST
304 default n
305 help
306 This will enable extra logging of work that happens between post
307 codes into CMOS for debug. This uses an additional 8 bytes of CMOS.
308
Daniele Forsiad488d22014-07-30 12:23:35 +0200[diff] [blame]309config CONSOLE_POST
Idwer Vollering5809a732014-03-11 15:36:21 +0000[diff] [blame]310 bool "Show POST codes on the debug console"
311 depends on !NO_POST
312 default n
313 help
314 If enabled, coreboot will additionally print POST codes (which are
315 usually displayed using a so-called "POST card" ISA/PCI/PCI-E
316 device) on the debug console.
317
318config POST_DEVICE
319 bool "Send POST codes to an external device"
320 depends on !NO_POST
321 default y
322
323choice
324 prompt "Device to send POST codes to"
325 depends on POST_DEVICE
326 default POST_DEVICE_NONE
327
328config POST_DEVICE_NONE
329 bool "None"
330config POST_DEVICE_LPC
331 bool "LPC"
332config POST_DEVICE_PCI_PCIE
333 bool "PCI/PCIe"
334endchoice
335
336config POST_IO
David Hendricks6b908d02012-11-05 12:34:09 -0800[diff] [blame]337 bool "Send POST codes to an IO port"
Idwer Vollering5809a732014-03-11 15:36:21 +0000[diff] [blame]338 depends on PC80_SYSTEM && !NO_POST
David Hendricks6b908d02012-11-05 12:34:09 -0800[diff] [blame]339 default y
340 help
341 If enabled, POST codes will be written to an IO port.
Stefan Reinauerc719f1a2010-03-30 09:57:28 +0000[diff] [blame]342
Idwer Vollering5809a732014-03-11 15:36:21 +0000[diff] [blame]343config POST_IO_PORT
344 depends on POST_IO
David Hendricks6b908d02012-11-05 12:34:09 -0800[diff] [blame]345 hex "IO port for POST codes"
346 default 0x80
347 help
348 POST codes on x86 are typically written to the LPC bus on port
Daniele Forsi53847a22014-07-22 18:00:56 +0200[diff] [blame]349 0x80. However, it may be desirable to change the port number
David Hendricks6b908d02012-11-05 12:34:09 -0800[diff] [blame]350 depending on the presence of coprocessors/microcontrollers or if the
351 platform does not support IO in the conventional x86 manner.
352
353endmenu