Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 LiPPERT Embedded Computers GmbH |
| 5 | * |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
Uwe Hermann | 86c9b88 | 2008-11-19 13:42:14 +0000 | [diff] [blame] | 21 | /* Based on irq_tables.c from AMD's DB800 mainboard. */ |
| 22 | |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 23 | #include <arch/pirq_routing.h> |
| 24 | #include <console/console.h> |
| 25 | #include <arch/io.h> |
| 26 | #include <arch/pirq_routing.h> |
Uwe Hermann | 5df4168 | 2010-09-25 16:17:20 +0000 | [diff] [blame] | 27 | #include "southbridge/amd/cs5536/cs5536.h" |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 28 | |
| 29 | /* Platform IRQs */ |
| 30 | #define PIRQA 10 |
| 31 | #define PIRQB 11 |
| 32 | #define PIRQC 5 |
| 33 | #define PIRQD 15 |
| 34 | |
| 35 | /* Map */ |
| 36 | #define M_PIRQA (1 << PIRQA) /* Bitmap of supported IRQs */ |
| 37 | #define M_PIRQB (1 << PIRQB) /* Bitmap of supported IRQs */ |
| 38 | #define M_PIRQC (1 << PIRQC) /* Bitmap of supported IRQs */ |
| 39 | #define M_PIRQD (1 << PIRQD) /* Bitmap of supported IRQs */ |
| 40 | |
| 41 | /* Link */ |
| 42 | #define L_PIRQA 1 /* Means Slot INTx# Connects To Chipset INTA# */ |
| 43 | #define L_PIRQB 2 /* Means Slot INTx# Connects To Chipset INTB# */ |
| 44 | #define L_PIRQC 3 /* Means Slot INTx# Connects To Chipset INTC# */ |
| 45 | #define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */ |
| 46 | |
Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame^] | 47 | static const struct irq_routing_table intel_irq_routing_table = { |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 48 | PIRQ_SIGNATURE, /* u32 signature */ |
| 49 | PIRQ_VERSION, /* u16 version */ |
Uwe Hermann | 95313d8 | 2009-10-07 21:51:33 +0000 | [diff] [blame] | 50 | 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 51 | 0x00, /* Where the interrupt router lies (bus) */ |
| 52 | (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */ |
| 53 | 0x00, /* IRQs devoted exclusively to PCI usage */ |
| 54 | 0x100B, /* Vendor */ |
| 55 | 0x002B, /* Device */ |
Uwe Hermann | 8fa90ec | 2010-09-21 21:16:27 +0000 | [diff] [blame] | 56 | 0, /* Miniport data */ |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 57 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* u8 rfu[11] */ |
Uwe Hermann | 86c9b88 | 2008-11-19 13:42:14 +0000 | [diff] [blame] | 58 | 0xE0, /* u8 checksum, this has to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 59 | { |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 60 | /* If you change the number of entries, change the CONFIG_IRQ_SLOT_COUNT above! */ |
Uwe Hermann | 86c9b88 | 2008-11-19 13:42:14 +0000 | [diff] [blame] | 61 | /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ |
| 62 | {0x00, (0x01 << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, /* CPU */ |
| 63 | {0x00, (0x0F << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x0, 0x0}, /* chipset */ |
| 64 | {0x00, (0x0E << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, /* ethernet */ |
| 65 | {0x00, (0x0B << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x1, 0x0}, /* slot1 */ |
| 66 | {0x00, (0x0A << 3) | 0x0, {{L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}, {L_PIRQA, M_PIRQA}}, 0x2, 0x0}, /* slot2 */ |
| 67 | {0x00, (0x09 << 3) | 0x0, {{L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}, {L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}}, 0x3, 0x0}, /* slot3 */ |
| 68 | {0x00, (0x08 << 3) | 0x0, {{L_PIRQD, M_PIRQD}, {L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}}, 0x4, 0x0}, /* slot4 */ |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 69 | } |
| 70 | }; |
| 71 | |
| 72 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 73 | { |
Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame^] | 74 | return copy_pirq_routing_table(addr, &intel_irq_routing_table); |
Jens Rottmann | f31ca16 | 2008-11-19 12:19:09 +0000 | [diff] [blame] | 75 | } |