| Felix Held | 3f3eca9 | 2020-01-23 17:12:32 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Richard Spiegel | ae5b367 | 2019-06-19 13:57:55 -0700 | [diff] [blame] | 2 | |
| 3 | /* |
| 4 | * Datasheet: |
| 5 | * - Name: F81803A |
| 6 | */ |
| 7 | |
| 8 | #ifndef SUPERIO_FINTEK_F81803_H |
| 9 | #define SUPERIO_FINTEK_F81803_H |
| 10 | |
| 11 | #define LDN_REG 0x07 /* Not defined under PNP */ |
| 12 | /* Logical Device Numbers (LDN) */ |
| 13 | #define F81803A_SP1 0x01 /* UART1 */ |
| 14 | #define F81803A_SP2 0x02 /* UART2 */ |
| 15 | #define F81803A_HWM 0x04 /* Hardware Monitor */ |
| 16 | #define F81803A_KBC 0x05 /* Keyboard/Mouse */ |
| 17 | #define F81803A_GPIO 0x06 /* General Purpose I/O (GPIO) */ |
| 18 | #define F81803A_WDT 0x07 /* Watch Dog Timer */ |
| 19 | #define F81803A_PME 0x0a /* Power Management Events (PME) */ |
| 20 | |
| Elyes HAOUAS | 8dcadc9 | 2020-03-30 16:44:54 +0200 | [diff] [blame] | 21 | /* Global Control Registers */ |
| Richard Spiegel | ae5b367 | 2019-06-19 13:57:55 -0700 | [diff] [blame] | 22 | #define CLOCK_SELECT_REG 0x26 |
| 23 | #define FUNC_PROG_SELECT (1<<3) |
| 24 | #define PORT_SELECT_REG 0x27 |
| 25 | |
| 26 | #define TSI_LEVEL_SELECT_REG 0x28 /* FUNC_PROG_SEL = 0 */ |
| 27 | #define TSI_PIN_SELECT_REG 0x28 /* FUNC_PROG_SEL = 1 */ |
| 28 | #define MULTI_FUNC_SEL_REG1 0x29 |
| 29 | #define MULTI_FUNC_SEL_REG2 0x2A |
| 30 | #define MULTI_FUNC_SEL_REG3 0x2B |
| 31 | #define MULTI_FUNC_SEL_REG 0x2C |
| 32 | #define WAKEUP_CONTROL_REG 0x2d |
| 33 | |
| 34 | /* LUN A - PME, ACPI, ERP */ |
| 35 | #define PME_DEVICE_ENABLE_REG 0x30 |
| 36 | #define PME_ENABLE (1<<0) |
| 37 | #define PME_ERP_ENABLE_REG 0xE0 |
| 38 | #define ERP_ENABLE (1<<7) |
| 39 | #define ERP_PME_EN (1<<1) |
| 40 | #define ERP_PSOUT_EN (1<<0) |
| 41 | #define PME_ERP_CONTROL_1_REG 0xE1 |
| 42 | #define PME_ERP_CONTROL_2_REG 0xE2 |
| 43 | #define PME_ERP_PSIN_DEBOUNCE_REG 0xE3 |
| 44 | #define PME_ERP_WAKEUP_ENABLE_REG 0xE8 |
| 45 | #define PME_ERP_MODE_SELECT_REG 0xEC |
| 46 | #define PME_EVENT_ENABLE_1_REG 0xF0 |
| 47 | #define PME_EVENT_STATUS_1_REG 0xF1 |
| 48 | #define PME_EVENT_ENABLE_2_REG 0xF2 |
| 49 | #define PME_EVENT_STATUS_2_REG 0xF3 |
| 50 | #define PME_ACPI_CONTROL_1_REG 0xF4 |
| 51 | #define PME_ACPI_CONTROL_2_REG 0xF5 |
| 52 | #define PME_ACPI_CONTROL_3_REG 0xF6 |
| 53 | #define PME_ACPI_CONTROL_4_REG 0xF7 |
| 54 | #define PME_ACPI_CONTROL_5_REG 0xFB |
| 55 | #define PME_ACPI_CONTROL_6_REG 0xFC |
| 56 | |
| 57 | #endif /* SUPERIO_FINTEK_F81803_H */ |