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Lee Leahyb0005132015-05-12 18:19:47 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Google Inc.
Rizwan Qureshi1222a732016-08-23 14:31:23 +05305 * Copyright (C) 2016 Intel Corporation.
Lee Leahyb0005132015-05-12 18:19:47 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Lee Leahyb0005132015-05-12 18:19:47 -070015 */
16
Lee Leahy1d14b3e2015-05-12 18:23:27 -070017#include <chip.h>
Rizwan Qureshi1222a732016-08-23 14:31:23 +053018#include <bootstate.h>
19#include <device/pci.h>
20#include <fsp/api.h>
Lee Leahyb0005132015-05-12 18:19:47 -070021
Rizwan Qureshi1222a732016-08-23 14:31:23 +053022/* UPD parameters to be initialized before SiliconInit */
23void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *supd)
24{
25}
Lee Leahyb0005132015-05-12 18:19:47 -070026
Rizwan Qureshi1222a732016-08-23 14:31:23 +053027struct pci_operations soc_pci_ops = {
28 /* TODO: Add set subsystem id function */
29};
Lee Leahyb0005132015-05-12 18:19:47 -070030