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Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Patrick Georgi0588d192009-08-12 15:00:51 +000016
Uwe Hermannad8c95f2012-04-12 22:00:03 +020017mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000018
Uwe Hermannc04be932009-10-05 13:55:28 +000019menu "General setup"
20
Lee Leahybb70c402017-04-03 07:38:20 -070021config COREBOOT_BUILD
22 bool
23 default y
24
Uwe Hermannc04be932009-10-05 13:55:28 +000025config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000026 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000027 help
28 Append an extra string to the end of the coreboot version.
29
Uwe Hermann168b11b2009-10-07 16:15:40 +000030 This can be useful if, for instance, you want to append the
31 respective board's hostname or some other identifying string to
32 the coreboot version number, so that you can easily distinguish
33 boot logs of different boards from each other.
34
Arthur Heymans6f751542019-06-08 11:28:52 +020035config CONFIGURABLE_CBFS_PREFIX
36 bool
37 help
38 Select this to prompt to use to configure the prefix for cbfs files.
39
Arthur Heymans6010eb22019-10-06 13:34:20 +020040choice
41 prompt "CBFS prefix to use"
42 depends on CONFIGURABLE_CBFS_PREFIX
43 default CBFS_PREFIX_FALLBACK
44
45config CBFS_PREFIX_FALLBACK
46 bool "fallback"
47
48config CBFS_PREFIX_NORMAL
49 bool "normal"
50
51config CBFS_PREFIX_DIY
52 bool "Define your own cbfs prefix"
53
54endchoice
55
Patrick Georgi4b8a2412010-02-09 19:35:16 +000056config CBFS_PREFIX
Arthur Heymans6010eb22019-10-06 13:34:20 +020057 string "CBFS prefix to use" if CBFS_PREFIX_DIY
58 default "fallback" if !CONFIGURABLE_CBFS_PREFIX || CBFS_PREFIX_FALLBACK
59 default "normal" if CBFS_PREFIX_NORMAL
Patrick Georgi4b8a2412010-02-09 19:35:16 +000060 help
61 Select the prefix to all files put into the image. It's "fallback"
62 by default, "normal" is a common alternative.
63
Patrick Georgi23d89cc2010-03-16 01:17:19 +000064choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020065 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000066 default COMPILER_GCC
67 help
68 This option allows you to select the compiler used for building
69 coreboot.
Martin Rotha5a628e82016-01-19 12:01:09 -070070 You must build the coreboot crosscompiler for the board that you
71 have selected.
72
73 To build all the GCC crosscompilers (takes a LONG time), run:
74 make crossgcc
75
76 For help on individual architectures, run the command:
77 make help_toolchain
Patrick Georgi23d89cc2010-03-16 01:17:19 +000078
79config COMPILER_GCC
80 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020081 help
82 Use the GNU Compiler Collection (GCC) to build coreboot.
83
84 For details see http://gcc.gnu.org.
85
Patrick Georgi23d89cc2010-03-16 01:17:19 +000086config COMPILER_LLVM_CLANG
Martin Rotha5a628e82016-01-19 12:01:09 -070087 bool "LLVM/clang (TESTING ONLY - Not currently working)"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020088 help
Martin Rotha5a628e82016-01-19 12:01:09 -070089 Use LLVM/clang to build coreboot. To use this, you must build the
90 coreboot version of the clang compiler. Run the command
91 make clang
92 Note that this option is not currently working correctly and should
93 really only be selected if you're trying to work on getting clang
94 operational.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020095
96 For details see http://clang.llvm.org.
97
Patrick Georgi23d89cc2010-03-16 01:17:19 +000098endchoice
99
Patrick Georgi9b0de712013-12-29 18:45:23 +0100100config ANY_TOOLCHAIN
101 bool "Allow building with any toolchain"
102 default n
Patrick Georgi9b0de712013-12-29 18:45:23 +0100103 help
104 Many toolchains break when building coreboot since it uses quite
105 unusual linker features. Unless developers explicitely request it,
106 we'll have to assume that they use their distro compiler by mistake.
107 Make sure that using patched compilers is a conscious decision.
108
Patrick Georgi516a2a72010-03-25 21:45:25 +0000109config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200110 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +0000111 default n
112 help
113 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200114
115 Requires the ccache utility in your system $PATH.
116
117 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +0000118
Sol Boucher69b88bf2015-02-26 11:47:19 -0800119config FMD_GENPARSER
120 bool "Generate flashmap descriptor parser using flex and bison"
121 default n
Sol Boucher69b88bf2015-02-26 11:47:19 -0800122 help
123 Enable this option if you are working on the flashmap descriptor
124 parser and made changes to fmd_scanner.l or fmd_parser.y.
125
126 Otherwise, say N to use the provided pregenerated scanner/parser.
127
Martin Rothf411b702017-04-09 19:12:42 -0600128config UTIL_GENPARSER
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100129 bool "Generate SCONFIG & BINCFG parser using flex and bison"
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000130 default n
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000131 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200132 Enable this option if you are working on the sconfig device tree
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100133 parser or bincfg and made changes to the .l or .y files.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200134
Sol Boucher69b88bf2015-02-26 11:47:19 -0800135 Otherwise, say N to use the provided pregenerated scanner/parser.
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000136
Joe Korty6d772522010-05-19 18:41:15 +0000137config USE_OPTION_TABLE
138 bool "Use CMOS for configuration values"
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000139 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000140 help
141 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200142 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000143
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600144config STATIC_OPTION_TABLE
145 bool "Load default configuration values into CMOS on each boot"
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600146 depends on USE_OPTION_TABLE
147 help
148 Enable this option to reset "CMOS" NVRAM values to default on
149 every boot. Use this if you want the NVRAM configuration to
150 never be modified from its default values.
151
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000152config COMPRESS_RAMSTAGE
153 bool "Compress ramstage with LZMA"
Subrata Banikb5962a92019-06-08 12:29:02 +0530154 depends on HAVE_RAMSTAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700155 # Default value set at the end of the file
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000156 help
Arthur Heymans7f229332019-11-08 11:59:25 +0100157 Compress ramstage to save memory in the flash image.
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000158
Julius Werner09f29212015-09-29 13:51:35 -0700159config COMPRESS_PRERAM_STAGES
160 bool "Compress romstage and verstage with LZ4"
Subrata Banikb5962a92019-06-08 12:29:02 +0530161 depends on !ARCH_X86 && (HAVE_ROMSTAGE || HAVE_VERSTAGE)
Martin Roth75e5cb72016-12-15 15:05:37 -0700162 # Default value set at the end of the file
Julius Werner09f29212015-09-29 13:51:35 -0700163 help
164 Compress romstage and (if it exists) verstage with LZ4 to save flash
165 space and speed up boot, since the time for reading the image from SPI
166 (and in the vboot case verifying it) is usually much greater than the
167 time spent decompressing. Doesn't work for XIP stages (assume all
168 ARCH_X86 for now) for obvious reasons.
169
Julius Werner99f46832018-05-16 14:14:04 -0700170config COMPRESS_BOOTBLOCK
171 bool
Subrata Banikb5962a92019-06-08 12:29:02 +0530172 depends on HAVE_BOOTBLOCK
Julius Werner99f46832018-05-16 14:14:04 -0700173 help
174 This option can be used to compress the bootblock with LZ4 and attach
175 a small self-decompression stub to its front. This can drastically
176 reduce boot time on platforms where the bootblock is loaded over a
177 very slow connection and bootblock size trumps all other factors for
Jonathan Neuschäfer2930a722018-09-29 17:42:52 +0200178 speed. Since using this option usually requires changes to the
Julius Werner99f46832018-05-16 14:14:04 -0700179 SoC memlayout and possibly extra support code, it should not be
180 user-selectable. (There's no real point in offering this to the user
181 anyway... if it works and saves boot time, you would always want it.)
182
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200183config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200184 bool "Include the coreboot .config file into the ROM image"
Martin Roth75e5cb72016-12-15 15:05:37 -0700185 # Default value set at the end of the file
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200186 help
187 Include the .config file that was used to compile coreboot
188 in the (CBFS) ROM image. This is useful if you want to know which
189 options were used to build a specific coreboot.rom image.
190
Daniele Forsi53847a22014-07-22 18:00:56 +0200191 Saying Y here will increase the image size by 2-3KB.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200192
193 You can use the following command to easily list the options:
194
195 grep -a CONFIG_ coreboot.rom
196
197 Alternatively, you can also use cbfstool to print the image
198 contents (including the raw 'config' item we're looking for).
199
200 Example:
201
202 $ cbfstool coreboot.rom print
203 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
204 offset 0x0
205 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600206
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200207 Name Offset Type Size
208 cmos_layout.bin 0x0 cmos layout 1159
209 fallback/romstage 0x4c0 stage 339756
Daniele Forsi53847a22014-07-22 18:00:56 +0200210 fallback/ramstage 0x53440 stage 186664
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200211 fallback/payload 0x80dc0 payload 51526
212 config 0x8d740 raw 3324
213 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200214
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700215config COLLECT_TIMESTAMPS
216 bool "Create a table of timestamps collected during boot"
Paul Menzel4e4a7632015-10-11 11:57:44 +0200217 default y if ARCH_X86
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700218 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200219 Make coreboot create a table of timer-ID/timer-value pairs to
220 allow measuring time spent at different phases of the boot process.
221
Martin Rothb22bbe22018-03-07 15:32:16 -0700222config TIMESTAMPS_ON_CONSOLE
223 bool "Print the timestamp values on the console"
224 default n
225 depends on COLLECT_TIMESTAMPS
226 help
227 Print the timestamps to the debug console if enabled at level spew.
228
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200229config USE_BLOBS
230 bool "Allow use of binary-only repository"
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200231 help
232 This draws in the blobs repository, which contains binary files that
233 might be required for some chipsets or boards.
234 This flag ensures that a "Free" option remains available for users.
235
Marshall Dawson20ce4002019-10-28 15:55:03 -0600236config USE_AMD_BLOBS
237 bool "Allow AMD blobs repository (with license agreement)"
238 depends on USE_BLOBS
239 help
240 This draws in the amd_blobs repository, which contains binary files
241 distributed by AMD, including VBIOS, PSP bootloaders, SMU firmwares,
242 etc. Selecting this item to download or clone the repo implies your
243 agreement to the AMD license agreement. A copy of the license text
244 may be reviewed by reading Documentation/soc/amd/amdblobs_license.md,
245 and your copy of the license is present in the repo once downloaded.
246
247 Note that for some products, omitting PSP, SMU images, or other items
248 may result in a nonbooting coreboot.rom.
249
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800250config COVERAGE
251 bool "Code coverage support"
252 depends on COMPILER_GCC
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800253 help
254 Add code coverage support for coreboot. This will store code
255 coverage information in CBMEM for extraction from user space.
256 If unsure, say N.
257
Ryan Salsamendiab37e9a2017-06-11 21:07:31 -0700258config UBSAN
259 bool "Undefined behavior sanitizer support"
260 default n
261 help
262 Instrument the code with checks for undefined behavior. If unsure,
263 say N because it adds a small performance penalty and may abort
264 on code that happens to work in spite of the UB.
265
Kyösti Mälkki7904e722018-06-03 14:55:10 +0300266config NO_RELOCATABLE_RAMSTAGE
267 bool
268 default n if ARCH_X86
269 default y
270
Stefan Reinauer58470e32014-10-17 13:08:36 +0200271config RELOCATABLE_RAMSTAGE
Kyösti Mälkki730df3c2016-06-18 07:39:31 +0300272 bool
Kyösti Mälkki730df3c2016-06-18 07:39:31 +0300273 default !NO_RELOCATABLE_RAMSTAGE
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200274 select RELOCATABLE_MODULES
Stefan Reinauer58470e32014-10-17 13:08:36 +0200275 help
276 The reloctable ramstage support allows for the ramstage to be built
277 as a relocatable module. The stage loader can identify a place
278 out of the OS way so that copying memory is unnecessary during an S3
279 wake. When selecting this option the romstage is responsible for
280 determing a stack location to use for loading the ramstage.
281
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300282config TSEG_STAGE_CACHE
Arthur Heymans410f2562017-01-25 15:27:52 +0100283 bool
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300284 default y
285 depends on !NO_STAGE_CACHE && SMM_TSEG
Stefan Reinauer58470e32014-10-17 13:08:36 +0200286 help
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300287 The option enables stage cache support for platform. Platform
288 can stash copies of postcar, ramstage and raw runtime data
289 inside SMM TSEG, to be restored on S3 resume path.
290
291config CBMEM_STAGE_CACHE
292 bool "Cache stages in CBMEM"
293 depends on !NO_STAGE_CACHE && !TSEG_STAGE_CACHE
294 help
295 The option enables stage cache support for platform. Platform
296 can stash copies of postcar, ramstage and raw runtime data
297 inside CBMEM.
298
299 While the approach is faster than reloading stages from boot media
300 it is also a possible attack scenario via which OS can possibly
301 circumvent SMM locks and SPI write protections.
302
303 If unsure, select 'N'
Stefan Reinauer58470e32014-10-17 13:08:36 +0200304
Stefan Reinauer58470e32014-10-17 13:08:36 +0200305config UPDATE_IMAGE
306 bool "Update existing coreboot.rom image"
Stefan Reinauer58470e32014-10-17 13:08:36 +0200307 help
308 If this option is enabled, no new coreboot.rom file
309 is created. Instead it is expected that there already
310 is a suitable file for further processing.
311 The bootblock will not be modified.
312
Martin Roth5942e062016-01-20 14:59:21 -0700313 If unsure, select 'N'
314
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400315config BOOTSPLASH_IMAGE
316 bool "Add a bootsplash image"
317 help
318 Select this option if you have a bootsplash image that you would
319 like to add to your ROM.
320
321 This will only add the image to the ROM. To actually run it check
322 options under 'Display' section.
323
324config BOOTSPLASH_FILE
325 string "Bootsplash path and filename"
326 depends on BOOTSPLASH_IMAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700327 # Default value set at the end of the file
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400328 help
329 The path and filename of the file to use as graphical bootsplash
330 screen. The file format has to be jpg.
331
Nico Huber94cdec62019-06-06 19:36:02 +0200332config HAVE_RAMPAYLOAD
333 bool
334
Subrata Banik7e893a02019-05-06 14:17:41 +0530335config RAMPAYLOAD
336 bool "Enable coreboot flow without executing ramstage"
Subrata Banik86dbe0f2019-06-28 18:18:37 +0530337 default y if ARCH_X86
Nico Huber94cdec62019-06-06 19:36:02 +0200338 depends on HAVE_RAMPAYLOAD
Subrata Banik7e893a02019-05-06 14:17:41 +0530339 help
340 If this option is enabled, coreboot flow will skip ramstage
341 loading and execution of ramstage to load payload.
342
343 Instead it is expected to load payload from postcar stage itself.
344
345 In this flow coreboot will perform basic x86 initialization
346 (DRAM resource allocation), MTRR programming,
347 Skip PCI enumeration logic and only allocate BAR for fixed devices
348 (bootable devices, TPM over GSPI).
349
Uwe Hermannc04be932009-10-05 13:55:28 +0000350endmenu
351
Martin Roth026e4dc2015-06-19 23:17:15 -0600352menu "Mainboard"
353
Stefan Reinauera48ca842015-04-04 01:58:28 +0200354source "src/mainboard/Kconfig"
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000355
Marshall Dawsone9375132016-09-04 08:38:33 -0600356config DEVICETREE
357 string
358 default "devicetree.cb"
359 help
360 This symbol allows mainboards to select a different file under their
361 mainboard directory for the devicetree.cb file. This allows the board
362 variants that need different devicetrees to be in the same directory.
363
364 Examples: "devicetree.variant.cb"
365 "variant/devicetree.cb"
366
Furquan Shaikhf2419982018-06-21 18:50:48 -0700367config OVERRIDE_DEVICETREE
368 string
369 default ""
370 help
371 This symbol allows variants to provide an override devicetree file to
372 override the registers and/or add new devices on top of the ones
373 provided by baseboard devicetree using CONFIG_DEVICETREE.
374
375 Examples: "devicetree.variant-override.cb"
376 "variant/devicetree-override.cb"
377
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200378config FMDFILE
379 string "fmap description file in fmd format"
Patrick Georgi5d7ab392015-12-12 00:23:15 +0100380 default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200381 default ""
382 help
383 The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
384 but in some cases more complex setups are required.
385 When an fmd is specified, it overrides the default format.
386
Arthur Heymans965881b2019-09-25 13:18:52 +0200387config CBFS_SIZE
388 hex "Size of CBFS filesystem in ROM"
389 depends on FMDFILE = ""
390 # Default value set at the end of the file
391 help
392 This is the part of the ROM actually managed by CBFS, located at the
393 end of the ROM (passed through cbfstool -o) on x86 and at at the start
394 of the ROM (passed through cbfstool -s) everywhere else. It defaults
395 to span the whole ROM on all but Intel systems that use an Intel Firmware
396 Descriptor. It can be overridden to make coreboot live alongside other
397 components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
398 binaries. This symbol should only be used to generate a default FMAP and
399 is unused when a non-default fmd file is provided via CONFIG_FMDFILE.
400
Martin Rothda1ca202015-12-26 16:51:16 -0700401endmenu
402
Martin Rothb09a5692016-01-24 19:38:33 -0700403# load site-local kconfig to allow user specific defaults and overrides
404source "site-local/Kconfig"
405
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200406config SYSTEM_TYPE_LAPTOP
Martin Roth595e7772015-04-26 18:53:26 -0600407 default n
408 bool
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200409
Duncan Laurie8312df42019-02-01 11:33:57 -0800410config SYSTEM_TYPE_TABLET
411 default n
412 bool
413
414config SYSTEM_TYPE_DETACHABLE
415 default n
416 bool
417
418config SYSTEM_TYPE_CONVERTIBLE
419 default n
420 bool
421
Werner Zehc0fb3612016-01-14 15:08:36 +0100422config CBFS_AUTOGEN_ATTRIBUTES
423 default n
424 bool
425 help
426 If this option is selected, every file in cbfs which has a constraint
427 regarding position or alignment will get an additional file attribute
428 which describes this constraint.
429
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000430menu "Chipset"
431
Duncan Lauried2119762015-06-08 18:11:56 -0700432comment "SoC"
Chris Chingaa8e5d32017-10-20 10:43:39 -0600433source "src/soc/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000434comment "CPU"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200435source "src/cpu/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000436comment "Northbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200437source "src/northbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000438comment "Southbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200439source "src/southbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000440comment "Super I/O"
Omar Pakker57603e22016-07-29 23:31:45 +0200441source "src/superio/*/*/Kconfig"
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000442comment "Embedded Controllers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200443source "src/ec/acpi/Kconfig"
444source "src/ec/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000445
Martin Roth59aa2b12015-06-20 16:17:12 -0600446source "src/southbridge/intel/common/firmware/Kconfig"
Martin Rothe1523ec2015-06-19 22:30:43 -0600447source "src/vendorcode/*/Kconfig"
Martin Roth59aa2b12015-06-20 16:17:12 -0600448
Martin Rothe1523ec2015-06-19 22:30:43 -0600449source "src/arch/*/Kconfig"
450
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000451endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000452
Stefan Reinauera48ca842015-04-04 01:58:28 +0200453source "src/device/Kconfig"
Stefan Reinauer95a63962012-11-13 17:00:01 -0800454
Rudolf Marekd9c25492010-05-16 15:31:53 +0000455menu "Generic Drivers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200456source "src/drivers/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800457source "src/drivers/*/*/Kconfig"
Lee Leahy48dbc662017-05-08 16:56:03 -0700458source "src/commonlib/storage/Kconfig"
Rudolf Marekd9c25492010-05-16 15:31:53 +0000459endmenu
460
Philipp Deppenwiese1899fbe2017-10-16 17:09:33 +0200461menu "Security"
462
463source "src/security/Kconfig"
Wim Vervoorne32d16f2019-11-14 14:10:28 +0100464source "src/vendorcode/eltan/security/Kconfig"
Philipp Deppenwiese1899fbe2017-10-16 17:09:33 +0200465
466endmenu
467
Martin Roth09210a12016-05-17 11:28:23 -0600468source "src/acpi/Kconfig"
469
Aaron Durbin4a36c4e2016-08-11 11:02:26 -0500470# This option is for the current boards/chipsets where SPI flash
471# is not the boot device. Currently nearly all boards/chipsets assume
472# SPI flash is the boot device.
473config BOOT_DEVICE_NOT_SPI_FLASH
474 bool
475 default n
476
477config BOOT_DEVICE_SPI_FLASH
478 bool
479 default y if !BOOT_DEVICE_NOT_SPI_FLASH
480 default n
481
Aaron Durbin16c173f2016-08-11 14:04:10 -0500482config BOOT_DEVICE_MEMORY_MAPPED
483 bool
484 default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
485 default n
486 help
487 Inform system if SPI is memory-mapped or not.
488
Aaron Durbine8e118d2016-08-12 15:00:10 -0500489config BOOT_DEVICE_SUPPORTS_WRITES
490 bool
491 default n
492 help
493 Indicate that the platform has writable boot device
494 support.
495
Patrick Georgi0770f252015-04-22 13:28:21 +0200496config RTC
497 bool
498 default n
499
Patrick Georgi0588d192009-08-12 15:00:51 +0000500config HEAP_SIZE
501 hex
Marty E. Plummer0987e432019-04-22 20:46:27 -0500502 default 0x100000 if FLATTENED_DEVICE_TREE
Myles Watson04000f42009-10-16 19:12:49 +0000503 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000504
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700505config STACK_SIZE
506 hex
Julius Werner66a476a2015-10-12 16:45:21 -0700507 default 0x1000 if ARCH_X86
508 default 0x0
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700509
Patrick Georgi0588d192009-08-12 15:00:51 +0000510config MAX_CPUS
511 int
512 default 1
513
Stefan Reinauera48ca842015-04-04 01:58:28 +0200514source "src/console/Kconfig"
Patrick Georgi0588d192009-08-12 15:00:51 +0000515
516config HAVE_ACPI_RESUME
517 bool
518 default n
Kyösti Mälkki7cd2c072018-06-03 23:04:28 +0300519 depends on RELOCATABLE_RAMSTAGE
Patrick Georgi0588d192009-08-12 15:00:51 +0000520
Aaron Durbin87c9fae2016-01-22 15:26:04 -0600521config RESUME_PATH_SAME_AS_BOOT
522 bool
523 default y if ARCH_X86
524 depends on HAVE_ACPI_RESUME
525 help
526 This option indicates that when a system resumes it takes the
527 same path as a regular boot. e.g. an x86 system runs from the
528 reset vector at 0xfffffff0 on both resume and warm/cold boot.
529
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300530config NO_MONOTONIC_TIMER
Aaron Durbina4217912013-04-29 22:31:51 -0500531 def_bool n
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300532
533config HAVE_MONOTONIC_TIMER
534 bool
535 depends on !NO_MONOTONIC_TIMER
Kyösti Mälkkib28b6b52019-07-01 15:38:25 +0300536 default y
Aaron Durbina4217912013-04-29 22:31:51 -0500537 help
538 The board/chipset provides a monotonic timer.
539
Aaron Durbine5e36302014-09-25 10:05:15 -0500540config GENERIC_UDELAY
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300541 bool
Aaron Durbine5e36302014-09-25 10:05:15 -0500542 depends on HAVE_MONOTONIC_TIMER
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300543 default y if !ARCH_X86
Aaron Durbine5e36302014-09-25 10:05:15 -0500544 help
545 The board/chipset uses a generic udelay function utilizing the
546 monotonic timer.
547
Aaron Durbin340ca912013-04-30 09:58:12 -0500548config TIMER_QUEUE
549 def_bool n
550 depends on HAVE_MONOTONIC_TIMER
551 help
Kyösti Mälkkiecd84242013-09-13 07:57:49 +0300552 Provide a timer queue for performing time-based callbacks.
Aaron Durbin340ca912013-04-30 09:58:12 -0500553
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500554config COOP_MULTITASKING
555 def_bool n
Aaron Durbin38c326d2013-05-06 12:22:23 -0500556 depends on TIMER_QUEUE && ARCH_X86
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500557 help
558 Cooperative multitasking allows callbacks to be multiplexed on the
559 main thread of ramstage. With this enabled it allows for multiple
560 execution paths to take place when they have udelay() calls within
561 their code.
562
563config NUM_THREADS
564 int
565 default 4
566 depends on COOP_MULTITASKING
567 help
568 How many execution threads to cooperatively multitask with.
569
Patrick Georgi0588d192009-08-12 15:00:51 +0000570config HAVE_OPTION_TABLE
571 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000572 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000573 help
574 This variable specifies whether a given board has a cmos.layout
575 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000576 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000577
Patrick Georgi0588d192009-08-12 15:00:51 +0000578config PCI_IO_CFG_EXT
579 bool
580 default n
581
582config IOAPIC
583 bool
584 default n
585
Myles Watson45bb25f2009-09-22 18:49:08 +0000586config USE_WATCHDOG_ON_BOOT
587 bool
588 default n
589
Myles Watson45bb25f2009-09-22 18:49:08 +0000590config GFXUMA
591 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000592 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000593 help
594 Enable Unified Memory Architecture for graphics.
595
Myles Watsonb8e20272009-10-15 13:35:47 +0000596config HAVE_ACPI_TABLES
597 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000598 help
599 This variable specifies whether a given board has ACPI table support.
600 It is usually set in mainboard/*/Kconfig.
Myles Watsonb8e20272009-10-15 13:35:47 +0000601
602config HAVE_MP_TABLE
603 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000604 help
605 This variable specifies whether a given board has MP table support.
606 It is usually set in mainboard/*/Kconfig.
607 Whether or not the MP table is actually generated by coreboot
608 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000609
610config HAVE_PIRQ_TABLE
611 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000612 help
613 This variable specifies whether a given board has PIRQ table support.
614 It is usually set in mainboard/*/Kconfig.
615 Whether or not the PIRQ table is actually generated by coreboot
616 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000617
Vladimir Serbinenkoc21e0732014-10-16 12:48:19 +0200618config COMMON_FADT
619 bool
620 default n
621
Aaron Durbin9420a522015-11-17 16:31:00 -0600622config ACPI_NHLT
623 bool
624 default n
625 help
626 Build support for NHLT (non HD Audio) ACPI table generation.
627
Marshall Dawson991467d2018-09-04 12:32:56 -0600628config ACPI_BERT
629 bool
630 depends on HAVE_ACPI_TABLES
631 help
632 Build an ACPI Boot Error Record Table.
633
Myles Watsond73c1b52009-10-26 15:14:07 +0000634#These Options are here to avoid "undefined" warnings.
635#The actual selection and help texts are in the following menu.
636
Uwe Hermann168b11b2009-10-07 16:15:40 +0000637menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000638
Myles Watsonb8e20272009-10-15 13:35:47 +0000639config GENERATE_MP_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800640 prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
641 bool
642 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000643 help
644 Generate an MP table (conforming to the Intel MultiProcessor
645 specification 1.4) for this board.
646
647 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000648
Myles Watsonb8e20272009-10-15 13:35:47 +0000649config GENERATE_PIRQ_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800650 prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE
651 bool
652 default HAVE_PIRQ_TABLE
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000653 help
654 Generate a PIRQ table for this board.
655
656 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000657
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200658config GENERATE_SMBIOS_TABLES
659 depends on ARCH_X86
660 bool "Generate SMBIOS tables"
661 default y
662 help
663 Generate SMBIOS tables for this board.
664
665 If unsure, say Y.
666
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200667config SMBIOS_PROVIDED_BY_MOBO
668 bool
669 default n
670
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200671config MAINBOARD_SERIAL_NUMBER
Nico Huberebd8a4f2017-11-01 09:49:16 +0100672 prompt "SMBIOS Serial Number" if !SMBIOS_PROVIDED_BY_MOBO
673 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200674 depends on GENERATE_SMBIOS_TABLES
675 default "123456789"
Martin Roth595e7772015-04-26 18:53:26 -0600676 help
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200677 The Serial Number to store in SMBIOS structures.
678
679config MAINBOARD_VERSION
Nico Huberebd8a4f2017-11-01 09:49:16 +0100680 prompt "SMBIOS Version Number" if !SMBIOS_PROVIDED_BY_MOBO
681 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200682 depends on GENERATE_SMBIOS_TABLES
683 default "1.0"
684 help
685 The Version Number to store in SMBIOS structures.
686
687config MAINBOARD_SMBIOS_MANUFACTURER
Nico Huberebd8a4f2017-11-01 09:49:16 +0100688 prompt "SMBIOS Manufacturer" if !SMBIOS_PROVIDED_BY_MOBO
689 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200690 depends on GENERATE_SMBIOS_TABLES
691 default MAINBOARD_VENDOR
692 help
693 Override the default Manufacturer stored in SMBIOS structures.
694
695config MAINBOARD_SMBIOS_PRODUCT_NAME
Nico Huberebd8a4f2017-11-01 09:49:16 +0100696 prompt "SMBIOS Product name" if !SMBIOS_PROVIDED_BY_MOBO
697 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200698 depends on GENERATE_SMBIOS_TABLES
699 default MAINBOARD_PART_NUMBER
700 help
701 Override the default Product name stored in SMBIOS structures.
702
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100703config SMBIOS_ENCLOSURE_TYPE
704 hex
705 depends on GENERATE_SMBIOS_TABLES
706 default 0x09 if SYSTEM_TYPE_LAPTOP
Duncan Laurie8312df42019-02-01 11:33:57 -0800707 default 0x1e if SYSTEM_TYPE_TABLET
708 default 0x1f if SYSTEM_TYPE_CONVERTIBLE
709 default 0x20 if SYSTEM_TYPE_DETACHABLE
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100710 default 0x03
711 help
712 System Enclosure or Chassis Types as defined in SMBIOS specification.
Duncan Laurie8312df42019-02-01 11:33:57 -0800713 The default value is SMBIOS_ENCLOSURE_DESKTOP (0x03) but laptop,
714 convertible, or tablet enclosure will be used if the appropriate
715 system type is selected.
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100716
Myles Watson45bb25f2009-09-22 18:49:08 +0000717endmenu
718
Martin Roth21c06502016-02-04 19:52:27 -0700719source "payloads/Kconfig"
Peter Stugea758ca22009-09-17 16:21:31 +0000720
Uwe Hermann168b11b2009-10-07 16:15:40 +0000721menu "Debugging"
722
Nico Huberd67edca2018-11-13 19:28:07 +0100723comment "CPU Debug Settings"
Arthur Heymansaae81902019-11-04 21:50:21 +0100724source "src/cpu/*/Kconfig.debug_cpu"
Nico Huberd67edca2018-11-13 19:28:07 +0100725
Arthur Heymans71bd7e42019-10-20 14:20:53 +0200726comment "BLOB Debug Settings"
727source "src/drivers/intel/fsp*/Kconfig.debug_blob"
728
Nico Huberd67edca2018-11-13 19:28:07 +0100729comment "General Debug Settings"
730
Uwe Hermann168b11b2009-10-07 16:15:40 +0000731# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000732config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000733 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200734 default n
Denis 'GNUtoo' Carikli3747ba12015-12-10 22:04:56 +0100735 depends on CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +0000736 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000737 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000738 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000739
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200740config GDB_WAIT
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100741 bool "Wait for a GDB connection in the ramstage"
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200742 default n
743 depends on GDB_STUB
744 help
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100745 If enabled, coreboot will wait for a GDB connection in the ramstage.
746
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200747
Julius Wernerd82e0cf2015-02-17 17:27:23 -0800748config FATAL_ASSERTS
749 bool "Halt when hitting a BUG() or assertion error"
750 default n
751 help
752 If enabled, coreboot will call hlt() on a BUG() or failed ASSERT().
753
Nico Huber371a6672018-11-13 22:06:40 +0100754config HAVE_DEBUG_GPIO
755 bool
756
757config DEBUG_GPIO
758 bool "Output verbose GPIO debug messages"
759 depends on HAVE_DEBUG_GPIO
760
Stefan Reinauerfe422182012-05-02 16:33:18 -0700761config DEBUG_CBFS
762 bool "Output verbose CBFS debug messages"
763 default n
Stefan Reinauerfe422182012-05-02 16:33:18 -0700764 help
765 This option enables additional CBFS related debug messages.
766
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000767config HAVE_DEBUG_RAM_SETUP
768 def_bool n
769
Uwe Hermann01ce6012010-03-05 10:03:50 +0000770config DEBUG_RAM_SETUP
771 bool "Output verbose RAM init debug messages"
772 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000773 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000774 help
775 This option enables additional RAM init related debug messages.
776 It is recommended to enable this when debugging issues on your
777 board which might be RAM init related.
778
779 Note: This option will increase the size of the coreboot image.
780
781 If unsure, say N.
782
Myles Watson80e914f2010-06-01 19:25:31 +0000783config DEBUG_PIRQ
784 bool "Check PIRQ table consistency"
785 default n
786 depends on GENERATE_PIRQ_TABLE
787 help
788 If unsure, say N.
789
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000790config HAVE_DEBUG_SMBUS
791 def_bool n
792
Uwe Hermann01ce6012010-03-05 10:03:50 +0000793config DEBUG_SMBUS
794 bool "Output verbose SMBus debug messages"
795 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000796 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000797 help
798 This option enables additional SMBus (and SPD) debug messages.
799
800 Note: This option will increase the size of the coreboot image.
801
802 If unsure, say N.
803
804config DEBUG_SMI
805 bool "Output verbose SMI debug messages"
806 default n
807 depends on HAVE_SMI_HANDLER
Nico Huber9e53db42018-06-05 22:34:08 +0200808 select SPI_FLASH_SMM if SPI_CONSOLE || CONSOLE_SPI_FLASH
Uwe Hermann01ce6012010-03-05 10:03:50 +0000809 help
810 This option enables additional SMI related debug messages.
811
812 Note: This option will increase the size of the coreboot image.
813
814 If unsure, say N.
815
Uwe Hermanna953f372010-11-10 00:14:32 +0000816# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
817# printk(BIOS_DEBUG, ...) calls.
818config DEBUG_MALLOC
Stefan Reinauer95a63962012-11-13 17:00:01 -0800819 prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
820 bool
Uwe Hermanna953f372010-11-10 00:14:32 +0000821 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000822 help
823 This option enables additional malloc related debug messages.
824
825 Note: This option will increase the size of the coreboot image.
826
827 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300828
Kyösti Mälkki66277952018-12-31 15:22:34 +0200829config DEBUG_CONSOLE_INIT
830 bool "Debug console initialisation code"
831 default n
832 help
833 With this option printk()'s are attempted before console hardware
834 initialisation has been completed. Your mileage may vary.
835
836 Typically you will need to modify source in console_hw_init() such
837 that a working console appears before the one you want to debug.
838
839 If unsure, say N.
840
Uwe Hermanna953f372010-11-10 00:14:32 +0000841# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
842# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000843config REALMODE_DEBUG
Stefan Reinauer95a63962012-11-13 17:00:01 -0800844 prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
845 bool
Myles Watson6c9bc012010-09-07 22:30:15 +0000846 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000847 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000848 help
849 This option enables additional x86emu related debug messages.
850
851 Note: This option will increase the time to emulate a ROM.
852
853 If unsure, say N.
854
Uwe Hermann01ce6012010-03-05 10:03:50 +0000855config X86EMU_DEBUG
856 bool "Output verbose x86emu debug messages"
857 default n
858 depends on PCI_OPTION_ROM_RUN_YABEL
859 help
860 This option enables additional x86emu related debug messages.
861
862 Note: This option will increase the size of the coreboot image.
863
864 If unsure, say N.
865
866config X86EMU_DEBUG_JMP
867 bool "Trace JMP/RETF"
868 default n
869 depends on X86EMU_DEBUG
870 help
871 Print information about JMP and RETF opcodes from x86emu.
872
873 Note: This option will increase the size of the coreboot image.
874
875 If unsure, say N.
876
877config X86EMU_DEBUG_TRACE
878 bool "Trace all opcodes"
879 default n
880 depends on X86EMU_DEBUG
881 help
882 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000883
Uwe Hermann01ce6012010-03-05 10:03:50 +0000884 WARNING: This will produce a LOT of output and take a long time.
885
886 Note: This option will increase the size of the coreboot image.
887
888 If unsure, say N.
889
890config X86EMU_DEBUG_PNP
891 bool "Log Plug&Play accesses"
892 default n
893 depends on X86EMU_DEBUG
894 help
895 Print Plug And Play accesses made by option ROMs.
896
897 Note: This option will increase the size of the coreboot image.
898
899 If unsure, say N.
900
901config X86EMU_DEBUG_DISK
902 bool "Log Disk I/O"
903 default n
904 depends on X86EMU_DEBUG
905 help
906 Print Disk I/O related messages.
907
908 Note: This option will increase the size of the coreboot image.
909
910 If unsure, say N.
911
912config X86EMU_DEBUG_PMM
913 bool "Log PMM"
914 default n
915 depends on X86EMU_DEBUG
916 help
917 Print messages related to POST Memory Manager (PMM).
918
919 Note: This option will increase the size of the coreboot image.
920
921 If unsure, say N.
922
923
924config X86EMU_DEBUG_VBE
925 bool "Debug VESA BIOS Extensions"
926 default n
927 depends on X86EMU_DEBUG
928 help
929 Print messages related to VESA BIOS Extension (VBE) functions.
930
931 Note: This option will increase the size of the coreboot image.
932
933 If unsure, say N.
934
935config X86EMU_DEBUG_INT10
936 bool "Redirect INT10 output to console"
937 default n
938 depends on X86EMU_DEBUG
939 help
940 Let INT10 (i.e. character output) calls print messages to debug output.
941
942 Note: This option will increase the size of the coreboot image.
943
944 If unsure, say N.
945
946config X86EMU_DEBUG_INTERRUPTS
947 bool "Log intXX calls"
948 default n
949 depends on X86EMU_DEBUG
950 help
951 Print messages related to interrupt handling.
952
953 Note: This option will increase the size of the coreboot image.
954
955 If unsure, say N.
956
957config X86EMU_DEBUG_CHECK_VMEM_ACCESS
958 bool "Log special memory accesses"
959 default n
960 depends on X86EMU_DEBUG
961 help
962 Print messages related to accesses to certain areas of the virtual
963 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
964
965 Note: This option will increase the size of the coreboot image.
966
967 If unsure, say N.
968
969config X86EMU_DEBUG_MEM
970 bool "Log all memory accesses"
971 default n
972 depends on X86EMU_DEBUG
973 help
974 Print memory accesses made by option ROM.
975 Note: This also includes accesses to fetch instructions.
976
977 Note: This option will increase the size of the coreboot image.
978
979 If unsure, say N.
980
981config X86EMU_DEBUG_IO
982 bool "Log IO accesses"
983 default n
984 depends on X86EMU_DEBUG
985 help
986 Print I/O accesses made by option ROM.
987
988 Note: This option will increase the size of the coreboot image.
989
990 If unsure, say N.
991
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +0200992config X86EMU_DEBUG_TIMINGS
993 bool "Output timing information"
994 default n
Kyösti Mälkki91945fb2019-07-10 15:10:22 +0300995 depends on X86EMU_DEBUG && HAVE_MONOTONIC_TIMER
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +0200996 help
997 Print timing information needed by i915tool.
998
999 If unsure, say N.
1000
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -07001001config DEBUG_SPI_FLASH
1002 bool "Output verbose SPI flash debug messages"
1003 default n
1004 depends on SPI_FLASH
1005 help
1006 This option enables additional SPI flash related debug messages.
1007
Stefan Reinauer8e073822012-04-04 00:07:22 +02001008if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
1009# Only visible with the right southbridge and loglevel.
1010config DEBUG_INTEL_ME
1011 bool "Verbose logging for Intel Management Engine"
1012 default n
1013 help
1014 Enable verbose logging for Intel Management Engine driver that
1015 is present on Intel 6-series chipsets.
1016endif
1017
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001018config TRACE
1019 bool "Trace function calls"
1020 default n
1021 help
1022 If enabled, every function will print information to console once
1023 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
1024 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
Ben Gardner8420ad42015-11-18 10:46:53 -06001025 of calling function. Please note some printk related functions
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001026 are omitted from trace to have good looking console dumps.
Stefan Reinauerd37ab452012-12-18 16:23:28 -08001027
1028config DEBUG_COVERAGE
1029 bool "Debug code coverage"
1030 default n
1031 depends on COVERAGE
1032 help
1033 If enabled, the code coverage hooks in coreboot will output some
1034 information about the coverage data that is dumped.
1035
Jonathan Neuschäferfc04f9b2016-06-29 21:59:32 +02001036config DEBUG_BOOT_STATE
1037 bool "Debug boot state machine"
1038 default n
1039 help
1040 Control debugging of the boot state machine. When selected displays
1041 the state boundaries in ramstage.
1042
Nico Hubere84e62542016-10-05 17:43:56 +02001043config DEBUG_ADA_CODE
1044 bool "Compile debug code in Ada sources"
1045 default n
1046 help
1047 Add the compiler switch `-gnata` to compile code guarded by
1048 `pragma Debug`.
1049
Simon Glass46255f72018-07-12 15:26:07 -06001050config HAVE_EM100_SUPPORT
1051 bool "Platform can support the Dediprog EM100 SPI emulator"
1052 help
1053 This is enabled by platforms which can support using the EM100.
1054
1055config EM100
1056 bool "Configure image for EM100 usage"
1057 depends on HAVE_EM100_SUPPORT
1058 help
1059 The Dediprog EM100 SPI emulator allows fast loading of new SPI images
1060 over USB. However it only supports a maximum SPI clock of 20MHz and
1061 single data output. Enable this option to use a 20MHz SPI clock and
1062 disable "Dual Output Fast Read" Support.
1063
1064 On AMD platforms this changes the SPI speed at run-time if the
1065 mainboard code supports this. On supported Intel platforms this works
1066 by changing the settings in the descriptor.bin file.
1067
Uwe Hermann168b11b2009-10-07 16:15:40 +00001068endmenu
1069
Martin Roth8e4aafb2016-12-15 15:25:15 -07001070
1071###############################################################################
1072# Set variables with no prompt - these can be set anywhere, and putting at
1073# the end of this file gives the most flexibility.
Nico Huber3db76532017-05-18 18:07:34 +02001074
1075source "src/lib/Kconfig"
1076
Myles Watsond73c1b52009-10-26 15:14:07 +00001077config ENABLE_APIC_EXT_ID
1078 bool
1079 default n
Myles Watson2e672732009-11-12 16:38:03 +00001080
1081config WARNINGS_ARE_ERRORS
1082 bool
Edward O'Callaghan63f6dc72014-11-18 03:17:54 +11001083 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001084
Peter Stuge51eafde2010-10-13 06:23:02 +00001085# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1086# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1087# mutually exclusive. One of these options must be selected in the
1088# mainboard Kconfig if the chipset supports enabling and disabling of
1089# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1090# in mainboard/Kconfig to know if the button should be enabled or not.
1091
1092config POWER_BUTTON_DEFAULT_ENABLE
1093 def_bool n
1094 help
1095 Select when the board has a power button which can optionally be
1096 disabled by the user.
1097
1098config POWER_BUTTON_DEFAULT_DISABLE
1099 def_bool n
1100 help
1101 Select when the board has a power button which can optionally be
1102 enabled by the user, e.g. when the board ships with a jumper over
1103 the power switch contacts.
1104
1105config POWER_BUTTON_FORCE_ENABLE
1106 def_bool n
1107 help
1108 Select when the board requires that the power button is always
1109 enabled.
1110
1111config POWER_BUTTON_FORCE_DISABLE
1112 def_bool n
1113 help
1114 Select when the board requires that the power button is always
1115 disabled, e.g. when it has been hardwired to ground.
1116
1117config POWER_BUTTON_IS_OPTIONAL
1118 bool
1119 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1120 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1121 help
1122 Internal option that controls ENABLE_POWER_BUTTON visibility.
Duncan Laurie72748002013-10-31 08:26:23 -07001123
1124config REG_SCRIPT
1125 bool
Duncan Laurie72748002013-10-31 08:26:23 -07001126 default n
1127 help
1128 Internal option that controls whether we compile in register scripts.
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001129
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001130config MAX_REBOOT_CNT
1131 int
1132 default 3
Timothy Pearson17ada2e2015-03-18 01:31:34 -05001133 help
1134 Internal option that sets the maximum number of bootblock executions allowed
1135 with the normal image enabled before assuming the normal image is defective
Vadim Bendebury9c9c3362014-07-23 09:40:02 -07001136 and switching to the fallback image.
Martin Roth59ff3402016-02-09 09:06:46 -07001137
Martin Roth8e4aafb2016-12-15 15:25:15 -07001138config UNCOMPRESSED_RAMSTAGE
1139 bool
1140
1141config NO_XIP_EARLY_STAGES
1142 bool
1143 default n if ARCH_X86
1144 default y
1145 help
1146 Identify if early stages are eXecute-In-Place(XIP).
1147
Martin Roth8e4aafb2016-12-15 15:25:15 -07001148config EARLY_CBMEM_LIST
1149 bool
1150 default n
1151 help
1152 Enable display of CBMEM during romstage and postcar.
1153
1154config RELOCATABLE_MODULES
1155 bool
1156 help
1157 If RELOCATABLE_MODULES is selected then support is enabled for
1158 building relocatable modules in the RAM stage. Those modules can be
1159 loaded anywhere and all the relocations are handled automatically.
1160
1161config NO_STAGE_CACHE
1162 bool
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +03001163 default y if !HAVE_ACPI_RESUME || !RELOCATABLE_RAMSTAGE
Martin Roth8e4aafb2016-12-15 15:25:15 -07001164 help
1165 Do not save any component in stage cache for resume path. On resume,
1166 all components would be read back from CBFS again.
1167
1168config GENERIC_GPIO_LIB
1169 bool
1170 help
1171 If enabled, compile the generic GPIO library. A "generic" GPIO
1172 implies configurability usually found on SoCs, particularly the
1173 ability to control internal pull resistors.
1174
Martin Roth8e4aafb2016-12-15 15:25:15 -07001175config BOOTBLOCK_CUSTOM
1176 # To be selected by arch, SoC or mainboard if it does not want use the normal
1177 # src/lib/bootblock.c#main() C entry point.
1178 bool
1179
Arthur Heymansc05b1a62019-11-22 21:01:30 +01001180config ROMCC_BOOTBLOCK
Martin Roth8e4aafb2016-12-15 15:25:15 -07001181 bool
1182
Martin Roth75e5cb72016-12-15 15:05:37 -07001183###############################################################################
1184# Set default values for symbols created before mainboards. This allows the
1185# option to be displayed in the general menu, but the default to be loaded in
1186# the mainboard if desired.
1187config COMPRESS_RAMSTAGE
1188 default y if !UNCOMPRESSED_RAMSTAGE
1189
1190config COMPRESS_PRERAM_STAGES
1191 depends on !ARCH_X86
1192 default y
1193
1194config INCLUDE_CONFIG_FILE
1195 default y
1196
Martin Roth75e5cb72016-12-15 15:05:37 -07001197config BOOTSPLASH_FILE
1198 depends on BOOTSPLASH_IMAGE
1199 default "bootsplash.jpg"
1200
1201config CBFS_SIZE
1202 default ROM_SIZE
Subrata Banikb5962a92019-06-08 12:29:02 +05301203
1204config HAVE_BOOTBLOCK
1205 bool
1206 default y
1207
1208config HAVE_VERSTAGE
1209 bool
1210 depends on VBOOT_SEPARATE_VERSTAGE
1211 default y
1212
1213config HAVE_ROMSTAGE
1214 bool
1215 default y
1216
Subrata Banikb5962a92019-06-08 12:29:02 +05301217config HAVE_RAMSTAGE
1218 bool
1219 default n if RAMPAYLOAD
1220 default y