blob: 532a9705245572f9a9d90ab1328401771de94111 [file] [log] [blame]
Stefan Reinauer00636b02012-04-04 00:08:51 +02001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2010 Google Inc.
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
8# the Free Software Foundation; version 2 of the License.
9#
10# This program is distributed in the hope that it will be useful,
11# but WITHOUT ANY WARRANTY; without even the implied warranty of
12# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13# GNU General Public License for more details.
14#
15# You should have received a copy of the GNU General Public License
16# along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010017# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Stefan Reinauer00636b02012-04-04 00:08:51 +020018#
19
Kyösti Mälkkicb08e162013-10-15 17:19:41 +030020ramstage-y += ram_calc.c
Patrick Georgi23f38cd2012-11-16 14:50:32 +010021ramstage-y += northbridge.c
22ramstage-y += gma.c
Vladimir Serbinenko1783a3c2014-02-23 00:10:35 +010023ramstage-$(CONFIG_IVYBRIDGE_LVDS) += gma_ivybridge_lvds.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020024
25ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
Stefan Reinauer1244f4b2012-05-10 11:31:40 -070026ramstage-y += mrccache.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020027
Kyösti Mälkkicb08e162013-10-15 17:19:41 +030028romstage-y += ram_calc.c
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020029romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += raminit.c
30romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += raminit.c
31romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE) += raminit_native.c
32romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE) += ../../../device/dram/ddr3.c
Stefan Reinauer1244f4b2012-05-10 11:31:40 -070033romstage-y += mrccache.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020034romstage-y += early_init.c
Vadim Bendebury7a3f36a2012-04-18 15:47:32 -070035romstage-y += report_platform.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020036romstage-y += ../../../arch/x86/lib/walkcbfs.S
37
Stefan Reinauer16401b82012-04-27 01:05:11 +020038smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
Stefan Reinauer00636b02012-04-04 00:08:51 +020039smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
40
41# We don't ship that, but booting without it is bound to fail
42cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin
Stefan Reinauercafedcf2012-05-01 16:37:18 -070043mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
Stefan Reinauer00636b02012-04-04 00:08:51 +020044mrc.bin-position := 0xfffa0000
Stefan Reinauer00636b02012-04-04 00:08:51 +020045mrc.bin-type := 0xab
Stefan Reinauere5a0a5d2012-09-19 10:51:48 -070046
Kyösti Mälkki591031f2014-02-13 00:33:40 +020047ifneq ($(CONFIG_CHROMEOS),y)
48$(obj)/mrc.cache: $(obj)/config.h
Patrick Georgi483ff822013-06-18 11:34:01 +020049 dd if=/dev/zero count=1 \
50 bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \
51 tr '\000' '\377' > $@
52
Vladimir Serbinenko5e73be22014-01-12 19:25:00 +010053cbfs-files-$(CONFIG_HAVE_MRC_CACHE) += mrc.cache
Patrick Georgi483ff822013-06-18 11:34:01 +020054mrc.cache-file := $(obj)/mrc.cache
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020055mrc-cache-position-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) := 0xfffd0000
56mrc-cache-position-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) := 0xfffd0000
57mrc-cache-position-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE) := 0xfffe0000
58mrc.cache-position := $(mrc-cache-position-y)
Patrick Georgi483ff822013-06-18 11:34:01 +020059mrc.cache-type := 0xac
Kyösti Mälkki591031f2014-02-13 00:33:40 +020060endif
Patrick Georgi483ff822013-06-18 11:34:01 +020061
Stefan Reinauere5a0a5d2012-09-19 10:51:48 -070062$(obj)/northbridge/intel/sandybridge/acpi.ramstage.o : $(obj)/build.h