blob: d768041e705ff1f5f3c1588da52623c42f0bcbc6 [file] [log] [blame]
Uwe Hermann970d06b2007-09-21 15:56:05 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Uwe Hermann970d06b2007-09-21 15:56:05 +00003 *
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Uwe Hermann970d06b2007-09-21 15:56:05 +000016 */
17
18#include <console/console.h>
19#include <device/pci.h>
20#include <device/pci_ids.h>
21#include <string.h>
22#include <stdint.h>
Stefan Reinauer9a16e3e2010-03-29 14:45:36 +000023#include <cpu/amd/multicore.h>
Uwe Hermann970d06b2007-09-21 15:56:05 +000024#include <cpu/amd/amdk8_sysconf.h>
Carl-Daniel Hailfinger2ee67792008-10-01 12:52:52 +000025#include <stdlib.h>
Uwe Hermann970d06b2007-09-21 15:56:05 +000026
27/* Global variables for MB layouts (shared by irqtable/mptable/acpi_table). */
28// busnum is default.
Uwe Hermann970d06b2007-09-21 15:56:05 +000029unsigned char bus_mcp55[8]; // 1
30unsigned apicid_mcp55;
31
32unsigned pci1234x[] = {
33 /* Here you only need to set value in pci1234 for HT-IO that could
34 * be installed or not. You may need to preset pci1234 for HTIO board,
35 * please refer to * src/northbridge/amd/amdk8/get_sblk_pci1234.c.
36 */
37 0x0000ff0,
38// 0x0000ff0,
39// 0x0000ff0,
40// 0x0000ff0,
41// 0x0000ff0,
42// 0x0000ff0,
43// 0x0000ff0,
44// 0x0000ff0
45};
46
47unsigned hcdnx[] = {
48 /* HT Chain device num, actually it is unit id base of every ht
49 * device in chain, assume every chain only have 4 ht device at most.
50 */
51 0x20202020,
52// 0x20202020,
53// 0x20202020,
54// 0x20202020,
55// 0x20202020,
56// 0x20202020,
57// 0x20202020,
58// 0x20202020,
59};
60
Uwe Hermann970d06b2007-09-21 15:56:05 +000061static unsigned get_bus_conf_done = 0;
62
63void get_bus_conf(void)
64{
65 unsigned int apicid_base, sbdn;
Elyes HAOUAS9740bcb2018-05-04 22:07:08 +020066 struct device *dev;
Patrick Georgi5244e1b2010-11-21 14:41:07 +000067 int i;
Uwe Hermann970d06b2007-09-21 15:56:05 +000068
69 if (get_bus_conf_done == 1)
70 return; /* Do it only once. */
71
72 get_bus_conf_done = 1;
73
Carl-Daniel Hailfinger2ee67792008-10-01 12:52:52 +000074 sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
Uwe Hermann970d06b2007-09-21 15:56:05 +000075 for (i = 0; i < sysconf.hc_possible_num; i++) {
76 sysconf.pci1234[i] = pci1234x[i];
77 sysconf.hcdn[i] = hcdnx[i];
78 }
79
80 get_sblk_pci1234();
81
82 sysconf.sbdn = (sysconf.hcdn[0] & 0xff); /* First byte of first chain */
83 sbdn = sysconf.sbdn;
84
85 for (i = 0; i < 8; i++)
86 bus_mcp55[i] = 0;
87
Uwe Hermann970d06b2007-09-21 15:56:05 +000088 bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
89
Uwe Hermann970d06b2007-09-21 15:56:05 +000090 /* MCP55 */
91 dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06, 0));
92 if (dev) {
93 bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
94 bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
95 bus_mcp55[2]++;
Uwe Hermann970d06b2007-09-21 15:56:05 +000096 } else {
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000097 printk
98 (BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",
Uwe Hermann970d06b2007-09-21 15:56:05 +000099 sbdn + 0x06);
100
101 bus_mcp55[1] = 2;
102 bus_mcp55[2] = 3;
103 }
104
105 for (i = 2; i < 8; i++) {
106 dev = dev_find_slot(bus_mcp55[0],
107 PCI_DEVFN(sbdn + 0x0a + i - 2, 0));
108 if (dev) {
109 bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
Uwe Hermann970d06b2007-09-21 15:56:05 +0000110 }
111 }
112
113/* I/O APICs: APIC ID Version State Address */
Timothy Pearsond4bbfe82015-10-27 16:48:36 -0500114 if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
115 apicid_base = get_apicid_base(1);
116 else
117 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
Uwe Hermann970d06b2007-09-21 15:56:05 +0000118 apicid_mcp55 = apicid_base + 0;
119}