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Eric Biedermanfcd5ace2004-10-14 19:29:29 +00001/*
Kyösti Mälkki0dbfb542011-11-22 20:21:06 +02002 * This software and ancillary information (herein called SOFTWARE)
3 * called LinuxBIOS is made available under the terms described here.
4 *
5 * The SOFTWARE has been approved for release with associated
6 * LA-CC Number 00-34. Unless otherwise indicated, this SOFTWARE has
7 * been authored by an employee or employees of the University of
8 * California, operator of the Los Alamos National Laboratory under
9 * Contract No. W-7405-ENG-36 with the U.S. Department of Energy.
10 *
11 * The U.S. Government has rights to use, reproduce, and distribute this
12 * SOFTWARE. The public may copy, distribute, prepare derivative works
13 * and publicly display this SOFTWARE without charge, provided that this
14 * Notice and any statement of authorship are reproduced on all copies.
15 *
16 * Neither the Government nor the University makes any warranty, express
17 * or implied, or assumes any liability or responsibility for the use of
18 * this SOFTWARE. If SOFTWARE is modified to produce derivative works,
19 * such modified SOFTWARE should be clearly marked, so as not to confuse
20 * it with the version available from LANL.
21 *
22 * Copyright (C) 2000, Ron Minnich rminnich@lanl.gov
23 * Advanced Computing Lab, LANL
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000024 */
25
26
Kyösti Mälkki0dbfb542011-11-22 20:21:06 +020027/* Start code to put an i386 or later processor into 32-bit protected mode.
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000028 */
29
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000030#include <arch/rom_segs.h>
31.code16
Aaron Durbinf8468d42016-03-02 14:47:37 -060032.globl _start16bit
33.type _start16bit, @function
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000034
Aaron Durbinf8468d42016-03-02 14:47:37 -060035_start16bit:
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000036 cli
37 /* Save the BIST result */
38 movl %eax, %ebp
Martin Roth14554372015-11-12 14:02:42 -070039#if !IS_ENABLED(CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES)
Kyösti Mälkki2a40ebc2011-11-21 08:16:20 +020040 post_code(POST_RESET_VECTOR_CORRECT)
Martin Roth14554372015-11-12 14:02:42 -070041#endif
Kyösti Mälkki2a40ebc2011-11-21 08:16:20 +020042
Kyösti Mälkki0dbfb542011-11-22 20:21:06 +020043 /* IMMEDIATELY invalidate the translation lookaside buffer (TLB) before
44 * executing any further code. Even though paging is disabled we
45 * could still get false address translations due to the TLB if we
46 * didn't invalidate it. Thanks to kmliu@sis.com.tw for this TLB fix.
47 */
48
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000049 xorl %eax, %eax
50 movl %eax, %cr3 /* Invalidate TLB*/
51
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000052 /* Invalidating the cache here seems to be a bad idea on
53 * modern processors. Don't.
54 * If we are hyperthreaded or we have multiple cores it is bad,
55 * for SMP startup. On Opterons it causes a 5 second delay.
56 * Invalidating the cache was pure paranoia in any event.
Paul Menzel39851122018-02-14 15:13:38 +010057 * If your CPU needs it you can write a CPU dependent version of
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000058 * entry16.inc.
59 */
60
61 /* Note: gas handles memory addresses in 16 bit code very poorly.
62 * In particular it doesn't appear to have a directive allowing you
63 * associate a section or even an absolute offset with a segment register.
64 *
65 * This means that anything except cs:ip relative offsets are
66 * a real pain in 16 bit mode. And explains why it is almost
Vikram Narayanan15370ca2012-01-21 20:19:14 +053067 * impossible to get gas to do lgdt correctly.
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000068 *
69 * One way to work around this is to have the linker do the
70 * math instead of the assembler. This solves the very
71 * pratical problem of being able to write code that can
72 * be relocated.
73 *
Stefan Reinauer14e22772010-04-27 06:56:47 +000074 * An lgdt call before we have memory enabled cannot be
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000075 * position independent, as we cannot execute a call
76 * instruction to get our current instruction pointer.
77 * So while this code is relocateable it isn't arbitrarily
78 * relocatable.
79 *
Stefan Reinauer14e22772010-04-27 06:56:47 +000080 * The criteria for relocation have been relaxed to their
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000081 * utmost, so that we can use the same code for both
Elyes HAOUASd6e96862016-08-21 10:12:15 +020082 * our initial entry point and startup of the second CPU.
Aaron Durbinf8468d42016-03-02 14:47:37 -060083 * The code assumes when executing at _start16bit that:
84 * (((cs & 0xfff) == 0) and (ip == _start16bit & 0xffff))
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000085 * or
86 * ((cs == anything) and (ip == 0)).
87 *
Aaron Durbinf8468d42016-03-02 14:47:37 -060088 * The restrictions in reset16.inc mean that _start16bit initially
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000089 * must be loaded at or above 0xffff0000 or below 0x100000.
90 *
Vikram Narayanan15370ca2012-01-21 20:19:14 +053091 * The linker scripts computes gdtptr16_offset by simply returning
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000092 * the low 16 bits. This means that the intial segment used
93 * when start is called must be 64K aligned. This should not
94 * restrict the address as the ip address can be anything.
Kyösti Mälkki78630152012-03-05 09:25:12 +020095 *
96 * Also load an IDT with NULL limit to prevent the 16bit IDT being used
97 * in protected mode before c_start.S sets up a 32bit IDT when entering
Elyes HAOUAS585d1a02016-07-28 19:15:34 +020098 * RAM stage. In practise: CPU will shutdown on any exception.
Kyösti Mälkki78630152012-03-05 09:25:12 +020099 * See IA32 manual Vol 3A 19.26 Interrupts.
Eric Biedermanfcd5ace2004-10-14 19:29:29 +0000100 */
101
102 movw %cs, %ax
103 shlw $4, %ax
Kyösti Mälkki78630152012-03-05 09:25:12 +0200104 movw $nullidt_offset, %bx
105 subw %ax, %bx
106 lidt %cs:(%bx)
Eric Biedermanfcd5ace2004-10-14 19:29:29 +0000107 movw $gdtptr16_offset, %bx
108 subw %ax, %bx
Patrick Georgi938ef9f2014-01-18 16:24:24 +0100109 lgdtl %cs:(%bx)
Eric Biedermanfcd5ace2004-10-14 19:29:29 +0000110
111 movl %cr0, %eax
112 andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0 */
113 orl $0x60000001, %eax /* CD, NW, PE = 1 */
114 movl %eax, %cr0
115
116 /* Restore BIST to %eax */
117 movl %ebp, %eax
118
119 /* Now that we are in protected mode jump to a 32 bit code segment. */
Patrick Georgi938ef9f2014-01-18 16:24:24 +0100120 ljmpl $ROM_CODE_SEG, $__protected_start
Eric Biedermanfcd5ace2004-10-14 19:29:29 +0000121
Li-Ta Lof84926e2004-11-04 18:36:06 +0000122 /**
123 * The gdt is defined in entry32.inc, it has a 4 Gb code segment
124 * at 0x08, and a 4 GB data segment at 0x10;
125 */
Eric Biedermanfcd5ace2004-10-14 19:29:29 +0000126.align 4
127.globl gdtptr16
128gdtptr16:
129 .word gdt_end - gdt -1 /* compute the table limit */
130 .long gdt /* we know the offset */
131
Stefan Reinauer71496be2011-06-01 14:01:46 -0700132.align 4
133.globl nullidt
134nullidt:
135 .word 0 /* limit */
136 .long 0
137 .word 0
138
Aaron Durbinf8468d42016-03-02 14:47:37 -0600139.globl _estart16bit
140_estart16bit:
Eric Biedermanfcd5ace2004-10-14 19:29:29 +0000141 .code32