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Stefan Reinauer8af0d032012-12-14 13:05:21 -08001/*
Julius Wernerd65e2142013-12-13 12:59:57 -08002 * arch/arm/asmlib.h
3 *
4 * Adapted from Linux arch/arm/include/assembler.h
Stefan Reinauer8af0d032012-12-14 13:05:21 -08005 *
6 * Copyright (C) 1996-2000 Russell King
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
Martin Roth4af58862016-01-21 13:15:16 -070012 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
Stefan Reinauer8af0d032012-12-14 13:05:21 -080017 * This file contains arm architecture specific defines
18 * for the different processors.
19 *
20 * Do not include any C declarations in this file - it is included by
21 * assembler source.
22 */
23
24/*
Julius Wernerd65e2142013-12-13 12:59:57 -080025 * WARNING: This file is *only* meant for memcpy.S and friends which were copied
26 * from Linux and require some weird macros. It does unspeakable things like
27 * redefining "push", so do *not* try to turn it into a general assembly macro
28 * file, and keep it out of global include directories.
29 */
30
31#ifndef __ARM_ASMLIB_H__
32#define __ARM_ASMLIB_H__
33
34/*
Stefan Reinauer8af0d032012-12-14 13:05:21 -080035 * Endian independent macros for shifting bytes within registers.
36 */
37#ifndef __ARMEB__
38#define pull lsr
39#define push lsl
40#define get_byte_0 lsl #0
41#define get_byte_1 lsr #8
42#define get_byte_2 lsr #16
43#define get_byte_3 lsr #24
44#define put_byte_0 lsl #0
45#define put_byte_1 lsl #8
46#define put_byte_2 lsl #16
47#define put_byte_3 lsl #24
48#else
49#define pull lsl
50#define push lsr
51#define get_byte_0 lsr #24
52#define get_byte_1 lsr #16
53#define get_byte_2 lsr #8
54#define get_byte_3 lsl #0
55#define put_byte_0 lsl #24
56#define put_byte_1 lsl #16
57#define put_byte_2 lsl #8
58#define put_byte_3 lsl #0
59#endif
60
61/*
62 * Data preload for architectures that support it
63 */
Julius Wernerd65e2142013-12-13 12:59:57 -080064#if __COREBOOT_ARM_ARCH__ >= 5
Stefan Reinauer8af0d032012-12-14 13:05:21 -080065#define PLD(code...) code
66#else
67#define PLD(code...)
68#endif
69
70/*
Julius Wernerd65e2142013-12-13 12:59:57 -080071 * This can be used to enable code to cacheline align the destination
72 * pointer when bulk writing to memory. Linux doesn't enable this except
73 * for the "Feroceon" processor, so we better just leave it out.
Stefan Reinauer8af0d032012-12-14 13:05:21 -080074 */
Julius Wernerd65e2142013-12-13 12:59:57 -080075#define CALGN(code...)
76
Martin Rothfd277d82016-01-11 12:47:30 -070077#endif /* __ARM_ASMLIB_H__ */