blob: 99a704dbd7dc2bf5a8e1cf95489425b7d45487a0 [file] [log] [blame]
Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Patrick Georgi0588d192009-08-12 15:00:51 +000016
Uwe Hermannad8c95f2012-04-12 22:00:03 +020017mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000018
Uwe Hermannc04be932009-10-05 13:55:28 +000019menu "General setup"
20
Lee Leahybb70c402017-04-03 07:38:20 -070021config COREBOOT_BUILD
22 bool
23 default y
24
Uwe Hermannc04be932009-10-05 13:55:28 +000025config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000026 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000027 help
28 Append an extra string to the end of the coreboot version.
29
Uwe Hermann168b11b2009-10-07 16:15:40 +000030 This can be useful if, for instance, you want to append the
31 respective board's hostname or some other identifying string to
32 the coreboot version number, so that you can easily distinguish
33 boot logs of different boards from each other.
34
Patrick Georgi4b8a2412010-02-09 19:35:16 +000035config CBFS_PREFIX
36 string "CBFS prefix to use"
37 default "fallback"
38 help
39 Select the prefix to all files put into the image. It's "fallback"
40 by default, "normal" is a common alternative.
41
Patrick Georgi23d89cc2010-03-16 01:17:19 +000042choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020043 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000044 default COMPILER_GCC
45 help
46 This option allows you to select the compiler used for building
47 coreboot.
Martin Rotha5a628e82016-01-19 12:01:09 -070048 You must build the coreboot crosscompiler for the board that you
49 have selected.
50
51 To build all the GCC crosscompilers (takes a LONG time), run:
52 make crossgcc
53
54 For help on individual architectures, run the command:
55 make help_toolchain
Patrick Georgi23d89cc2010-03-16 01:17:19 +000056
57config COMPILER_GCC
58 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020059 help
60 Use the GNU Compiler Collection (GCC) to build coreboot.
61
62 For details see http://gcc.gnu.org.
63
Patrick Georgi23d89cc2010-03-16 01:17:19 +000064config COMPILER_LLVM_CLANG
Martin Rotha5a628e82016-01-19 12:01:09 -070065 bool "LLVM/clang (TESTING ONLY - Not currently working)"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020066 help
Martin Rotha5a628e82016-01-19 12:01:09 -070067 Use LLVM/clang to build coreboot. To use this, you must build the
68 coreboot version of the clang compiler. Run the command
69 make clang
70 Note that this option is not currently working correctly and should
71 really only be selected if you're trying to work on getting clang
72 operational.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020073
74 For details see http://clang.llvm.org.
75
Patrick Georgi23d89cc2010-03-16 01:17:19 +000076endchoice
77
Patrick Georgi9b0de712013-12-29 18:45:23 +010078config ANY_TOOLCHAIN
79 bool "Allow building with any toolchain"
80 default n
Patrick Georgi9b0de712013-12-29 18:45:23 +010081 help
82 Many toolchains break when building coreboot since it uses quite
83 unusual linker features. Unless developers explicitely request it,
84 we'll have to assume that they use their distro compiler by mistake.
85 Make sure that using patched compilers is a conscious decision.
86
Patrick Georgi516a2a72010-03-25 21:45:25 +000087config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +020088 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +000089 default n
90 help
91 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020092
93 Requires the ccache utility in your system $PATH.
94
95 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +000096
Sol Boucher69b88bf2015-02-26 11:47:19 -080097config FMD_GENPARSER
98 bool "Generate flashmap descriptor parser using flex and bison"
99 default n
Sol Boucher69b88bf2015-02-26 11:47:19 -0800100 help
101 Enable this option if you are working on the flashmap descriptor
102 parser and made changes to fmd_scanner.l or fmd_parser.y.
103
104 Otherwise, say N to use the provided pregenerated scanner/parser.
105
Martin Rothf411b702017-04-09 19:12:42 -0600106config UTIL_GENPARSER
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100107 bool "Generate SCONFIG & BINCFG parser using flex and bison"
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000108 default n
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000109 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200110 Enable this option if you are working on the sconfig device tree
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100111 parser or bincfg and made changes to the .l or .y files.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200112
Sol Boucher69b88bf2015-02-26 11:47:19 -0800113 Otherwise, say N to use the provided pregenerated scanner/parser.
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000114
Joe Korty6d772522010-05-19 18:41:15 +0000115config USE_OPTION_TABLE
116 bool "Use CMOS for configuration values"
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000117 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000118 help
119 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200120 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000121
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600122config STATIC_OPTION_TABLE
123 bool "Load default configuration values into CMOS on each boot"
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600124 depends on USE_OPTION_TABLE
125 help
126 Enable this option to reset "CMOS" NVRAM values to default on
127 every boot. Use this if you want the NVRAM configuration to
128 never be modified from its default values.
129
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000130config COMPRESS_RAMSTAGE
131 bool "Compress ramstage with LZMA"
Martin Roth75e5cb72016-12-15 15:05:37 -0700132 # Default value set at the end of the file
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000133 help
134 Compress ramstage to save memory in the flash image. Note
135 that decompression might slow down booting if the boot flash
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200136 is connected through a slow link (i.e. SPI).
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000137
Julius Werner09f29212015-09-29 13:51:35 -0700138config COMPRESS_PRERAM_STAGES
139 bool "Compress romstage and verstage with LZ4"
Martin Rothf2e04612016-03-09 15:50:23 -0700140 depends on !ARCH_X86
Martin Roth75e5cb72016-12-15 15:05:37 -0700141 # Default value set at the end of the file
Julius Werner09f29212015-09-29 13:51:35 -0700142 help
143 Compress romstage and (if it exists) verstage with LZ4 to save flash
144 space and speed up boot, since the time for reading the image from SPI
145 (and in the vboot case verifying it) is usually much greater than the
146 time spent decompressing. Doesn't work for XIP stages (assume all
147 ARCH_X86 for now) for obvious reasons.
148
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200149config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200150 bool "Include the coreboot .config file into the ROM image"
Martin Roth75e5cb72016-12-15 15:05:37 -0700151 # Default value set at the end of the file
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200152 help
153 Include the .config file that was used to compile coreboot
154 in the (CBFS) ROM image. This is useful if you want to know which
155 options were used to build a specific coreboot.rom image.
156
Daniele Forsi53847a22014-07-22 18:00:56 +0200157 Saying Y here will increase the image size by 2-3KB.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200158
159 You can use the following command to easily list the options:
160
161 grep -a CONFIG_ coreboot.rom
162
163 Alternatively, you can also use cbfstool to print the image
164 contents (including the raw 'config' item we're looking for).
165
166 Example:
167
168 $ cbfstool coreboot.rom print
169 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
170 offset 0x0
171 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600172
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200173 Name Offset Type Size
174 cmos_layout.bin 0x0 cmos layout 1159
175 fallback/romstage 0x4c0 stage 339756
Daniele Forsi53847a22014-07-22 18:00:56 +0200176 fallback/ramstage 0x53440 stage 186664
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200177 fallback/payload 0x80dc0 payload 51526
178 config 0x8d740 raw 3324
179 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200180
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700181config COLLECT_TIMESTAMPS
182 bool "Create a table of timestamps collected during boot"
Paul Menzel4e4a7632015-10-11 11:57:44 +0200183 default y if ARCH_X86
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700184 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200185 Make coreboot create a table of timer-ID/timer-value pairs to
186 allow measuring time spent at different phases of the boot process.
187
Martin Rothb22bbe22018-03-07 15:32:16 -0700188config TIMESTAMPS_ON_CONSOLE
189 bool "Print the timestamp values on the console"
190 default n
191 depends on COLLECT_TIMESTAMPS
192 help
193 Print the timestamps to the debug console if enabled at level spew.
194
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200195config USE_BLOBS
196 bool "Allow use of binary-only repository"
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200197 help
198 This draws in the blobs repository, which contains binary files that
199 might be required for some chipsets or boards.
200 This flag ensures that a "Free" option remains available for users.
201
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800202config COVERAGE
203 bool "Code coverage support"
204 depends on COMPILER_GCC
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800205 help
206 Add code coverage support for coreboot. This will store code
207 coverage information in CBMEM for extraction from user space.
208 If unsure, say N.
209
Ryan Salsamendiab37e9a2017-06-11 21:07:31 -0700210config UBSAN
211 bool "Undefined behavior sanitizer support"
212 default n
213 help
214 Instrument the code with checks for undefined behavior. If unsure,
215 say N because it adds a small performance penalty and may abort
216 on code that happens to work in spite of the UB.
217
Stefan Reinauer58470e32014-10-17 13:08:36 +0200218config RELOCATABLE_RAMSTAGE
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200219 depends on EARLY_CBMEM_INIT
Stefan Reinauer58470e32014-10-17 13:08:36 +0200220 bool "Build the ramstage to be relocatable in 32-bit address space."
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200221 select RELOCATABLE_MODULES
Stefan Reinauer58470e32014-10-17 13:08:36 +0200222 help
223 The reloctable ramstage support allows for the ramstage to be built
224 as a relocatable module. The stage loader can identify a place
225 out of the OS way so that copying memory is unnecessary during an S3
226 wake. When selecting this option the romstage is responsible for
227 determing a stack location to use for loading the ramstage.
228
229config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
230 depends on RELOCATABLE_RAMSTAGE
Arthur Heymans410f2562017-01-25 15:27:52 +0100231 bool
Stefan Reinauer58470e32014-10-17 13:08:36 +0200232 help
233 The relocated ramstage is saved in an area specified by the
234 by the board and/or chipset.
235
Stefan Reinauer58470e32014-10-17 13:08:36 +0200236config UPDATE_IMAGE
237 bool "Update existing coreboot.rom image"
Stefan Reinauer58470e32014-10-17 13:08:36 +0200238 help
239 If this option is enabled, no new coreboot.rom file
240 is created. Instead it is expected that there already
241 is a suitable file for further processing.
242 The bootblock will not be modified.
243
Martin Roth5942e062016-01-20 14:59:21 -0700244 If unsure, select 'N'
245
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400246config BOOTSPLASH_IMAGE
247 bool "Add a bootsplash image"
248 help
249 Select this option if you have a bootsplash image that you would
250 like to add to your ROM.
251
252 This will only add the image to the ROM. To actually run it check
253 options under 'Display' section.
254
255config BOOTSPLASH_FILE
256 string "Bootsplash path and filename"
257 depends on BOOTSPLASH_IMAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700258 # Default value set at the end of the file
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400259 help
260 The path and filename of the file to use as graphical bootsplash
261 screen. The file format has to be jpg.
262
Uwe Hermannc04be932009-10-05 13:55:28 +0000263endmenu
264
Martin Roth026e4dc2015-06-19 23:17:15 -0600265menu "Mainboard"
266
Stefan Reinauera48ca842015-04-04 01:58:28 +0200267source "src/mainboard/Kconfig"
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000268
Marshall Dawsone9375132016-09-04 08:38:33 -0600269config DEVICETREE
270 string
271 default "devicetree.cb"
272 help
273 This symbol allows mainboards to select a different file under their
274 mainboard directory for the devicetree.cb file. This allows the board
275 variants that need different devicetrees to be in the same directory.
276
277 Examples: "devicetree.variant.cb"
278 "variant/devicetree.cb"
279
Martin Roth026e4dc2015-06-19 23:17:15 -0600280config CBFS_SIZE
281 hex "Size of CBFS filesystem in ROM"
Martin Roth75e5cb72016-12-15 15:05:37 -0700282 # Default value set at the end of the file
Martin Roth026e4dc2015-06-19 23:17:15 -0600283 help
284 This is the part of the ROM actually managed by CBFS, located at the
285 end of the ROM (passed through cbfstool -o) on x86 and at at the start
286 of the ROM (passed through cbfstool -s) everywhere else. It defaults
287 to span the whole ROM on all but Intel systems that use an Intel Firmware
288 Descriptor. It can be overridden to make coreboot live alongside other
289 components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
290 binaries.
291
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200292config FMDFILE
293 string "fmap description file in fmd format"
Patrick Georgi5d7ab392015-12-12 00:23:15 +0100294 default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200295 default ""
296 help
297 The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
298 but in some cases more complex setups are required.
299 When an fmd is specified, it overrides the default format.
300
Martin Rothda1ca202015-12-26 16:51:16 -0700301endmenu
302
Martin Rothb09a5692016-01-24 19:38:33 -0700303# load site-local kconfig to allow user specific defaults and overrides
304source "site-local/Kconfig"
305
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200306config SYSTEM_TYPE_LAPTOP
Martin Roth595e7772015-04-26 18:53:26 -0600307 default n
308 bool
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200309
Werner Zehc0fb3612016-01-14 15:08:36 +0100310config CBFS_AUTOGEN_ATTRIBUTES
311 default n
312 bool
313 help
314 If this option is selected, every file in cbfs which has a constraint
315 regarding position or alignment will get an additional file attribute
316 which describes this constraint.
317
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000318menu "Chipset"
319
Duncan Lauried2119762015-06-08 18:11:56 -0700320comment "SoC"
Chris Chingaa8e5d32017-10-20 10:43:39 -0600321source "src/soc/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000322comment "CPU"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200323source "src/cpu/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000324comment "Northbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200325source "src/northbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000326comment "Southbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200327source "src/southbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000328comment "Super I/O"
Omar Pakker57603e22016-07-29 23:31:45 +0200329source "src/superio/*/*/Kconfig"
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000330comment "Embedded Controllers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200331source "src/ec/acpi/Kconfig"
332source "src/ec/*/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800333# FIXME move to vendorcode
Marc Jones78687972015-04-22 23:16:31 -0600334source "src/drivers/intel/fsp1_0/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000335
Martin Roth59aa2b12015-06-20 16:17:12 -0600336source "src/southbridge/intel/common/firmware/Kconfig"
Martin Rothe1523ec2015-06-19 22:30:43 -0600337source "src/vendorcode/*/Kconfig"
Martin Roth59aa2b12015-06-20 16:17:12 -0600338
Martin Rothe1523ec2015-06-19 22:30:43 -0600339source "src/arch/*/Kconfig"
340
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000341endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000342
Stefan Reinauera48ca842015-04-04 01:58:28 +0200343source "src/device/Kconfig"
Stefan Reinauer95a63962012-11-13 17:00:01 -0800344
Rudolf Marekd9c25492010-05-16 15:31:53 +0000345menu "Generic Drivers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200346source "src/drivers/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800347source "src/drivers/*/*/Kconfig"
Lee Leahy48dbc662017-05-08 16:56:03 -0700348source "src/commonlib/storage/Kconfig"
Rudolf Marekd9c25492010-05-16 15:31:53 +0000349endmenu
350
Philipp Deppenwiese1899fbe2017-10-16 17:09:33 +0200351menu "Security"
352
353source "src/security/Kconfig"
354
355endmenu
356
Martin Roth09210a12016-05-17 11:28:23 -0600357source "src/acpi/Kconfig"
358
Aaron Durbin4a36c4e2016-08-11 11:02:26 -0500359# This option is for the current boards/chipsets where SPI flash
360# is not the boot device. Currently nearly all boards/chipsets assume
361# SPI flash is the boot device.
362config BOOT_DEVICE_NOT_SPI_FLASH
363 bool
364 default n
365
366config BOOT_DEVICE_SPI_FLASH
367 bool
368 default y if !BOOT_DEVICE_NOT_SPI_FLASH
369 default n
370
Aaron Durbin16c173f2016-08-11 14:04:10 -0500371config BOOT_DEVICE_MEMORY_MAPPED
372 bool
373 default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
374 default n
375 help
376 Inform system if SPI is memory-mapped or not.
377
Aaron Durbine8e118d2016-08-12 15:00:10 -0500378config BOOT_DEVICE_SUPPORTS_WRITES
379 bool
380 default n
381 help
382 Indicate that the platform has writable boot device
383 support.
384
Patrick Georgi0770f252015-04-22 13:28:21 +0200385config RTC
386 bool
387 default n
388
Patrick Georgi0588d192009-08-12 15:00:51 +0000389config HEAP_SIZE
390 hex
Myles Watson04000f42009-10-16 19:12:49 +0000391 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000392
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700393config STACK_SIZE
394 hex
Julius Werner66a476a2015-10-12 16:45:21 -0700395 default 0x1000 if ARCH_X86
396 default 0x0
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700397
Patrick Georgi0588d192009-08-12 15:00:51 +0000398config MAX_CPUS
399 int
400 default 1
401
Stefan Reinauera48ca842015-04-04 01:58:28 +0200402source "src/console/Kconfig"
Patrick Georgi0588d192009-08-12 15:00:51 +0000403
404config HAVE_ACPI_RESUME
405 bool
406 default n
407
Kyösti Mälkki9d6f3652016-06-28 07:38:46 +0300408config ACPI_HUGE_LOWMEM_BACKUP
409 bool
Kyösti Mälkki43e9c932016-11-10 11:50:21 +0200410 default n
Kyösti Mälkki9d6f3652016-06-28 07:38:46 +0300411 help
412 On S3 resume path, backup low memory from RAMBASE..RAMTOP in CBMEM.
413
Aaron Durbin87c9fae2016-01-22 15:26:04 -0600414config RESUME_PATH_SAME_AS_BOOT
415 bool
416 default y if ARCH_X86
417 depends on HAVE_ACPI_RESUME
418 help
419 This option indicates that when a system resumes it takes the
420 same path as a regular boot. e.g. an x86 system runs from the
421 reset vector at 0xfffffff0 on both resume and warm/cold boot.
422
Patrick Georgi0588d192009-08-12 15:00:51 +0000423config HAVE_HARD_RESET
424 bool
Uwe Hermann748475b2009-10-09 11:47:21 +0000425 default n
Patrick Georgi37bdb872010-02-27 08:39:04 +0000426 help
427 This variable specifies whether a given board has a hard_reset
428 function, no matter if it's provided by board code or chipset code.
429
Timothy Pearson44d53422015-05-18 16:04:10 -0500430config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
431 bool
Kyösti Mälkkib5664de2016-07-08 13:33:00 +0300432 depends on EARLY_CBMEM_INIT
Timothy Pearson44d53422015-05-18 16:04:10 -0500433 default n
434
Timothy Pearson7b22d842015-08-28 19:52:05 -0500435config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
436 bool
Kyösti Mälkkib5664de2016-07-08 13:33:00 +0300437 depends on EARLY_CBMEM_INIT
Timothy Pearson7b22d842015-08-28 19:52:05 -0500438 default n
439 help
440 This should be enabled on certain plaforms, such as the AMD
441 SR565x, that cannot handle concurrent CBFS accesses from
442 multiple APs during early startup.
443
Timothy Pearsonc764c742015-08-28 20:48:17 -0500444config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
445 bool
Kyösti Mälkkib5664de2016-07-08 13:33:00 +0300446 depends on EARLY_CBMEM_INIT
Timothy Pearsonc764c742015-08-28 20:48:17 -0500447 default n
448
Aaron Durbina4217912013-04-29 22:31:51 -0500449config HAVE_MONOTONIC_TIMER
450 def_bool n
451 help
452 The board/chipset provides a monotonic timer.
453
Aaron Durbine5e36302014-09-25 10:05:15 -0500454config GENERIC_UDELAY
455 def_bool n
456 depends on HAVE_MONOTONIC_TIMER
457 help
458 The board/chipset uses a generic udelay function utilizing the
459 monotonic timer.
460
Aaron Durbin340ca912013-04-30 09:58:12 -0500461config TIMER_QUEUE
462 def_bool n
463 depends on HAVE_MONOTONIC_TIMER
464 help
Kyösti Mälkkiecd84242013-09-13 07:57:49 +0300465 Provide a timer queue for performing time-based callbacks.
Aaron Durbin340ca912013-04-30 09:58:12 -0500466
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500467config COOP_MULTITASKING
468 def_bool n
Aaron Durbin38c326d2013-05-06 12:22:23 -0500469 depends on TIMER_QUEUE && ARCH_X86
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500470 help
471 Cooperative multitasking allows callbacks to be multiplexed on the
472 main thread of ramstage. With this enabled it allows for multiple
473 execution paths to take place when they have udelay() calls within
474 their code.
475
476config NUM_THREADS
477 int
478 default 4
479 depends on COOP_MULTITASKING
480 help
481 How many execution threads to cooperatively multitask with.
482
Patrick Georgi0588d192009-08-12 15:00:51 +0000483config HAVE_OPTION_TABLE
484 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000485 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000486 help
487 This variable specifies whether a given board has a cmos.layout
488 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000489 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000490
Patrick Georgi0588d192009-08-12 15:00:51 +0000491config PIRQ_ROUTE
492 bool
493 default n
494
495config HAVE_SMI_HANDLER
496 bool
497 default n
498
499config PCI_IO_CFG_EXT
500 bool
501 default n
502
503config IOAPIC
504 bool
505 default n
506
Kyösti Mälkki107f72e2014-01-06 11:06:26 +0200507config CACHE_ROM_SIZE_OVERRIDE
Stefan Reinauer5b635792012-08-16 14:05:42 -0700508 hex
Martin Roth3b878122016-09-30 14:43:01 -0600509 default 0x0
Stefan Reinauer5b635792012-08-16 14:05:42 -0700510
Myles Watson45bb25f2009-09-22 18:49:08 +0000511config USE_WATCHDOG_ON_BOOT
512 bool
513 default n
514
Myles Watson45bb25f2009-09-22 18:49:08 +0000515config GFXUMA
516 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000517 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000518 help
519 Enable Unified Memory Architecture for graphics.
520
Myles Watsonb8e20272009-10-15 13:35:47 +0000521config HAVE_ACPI_TABLES
522 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000523 help
524 This variable specifies whether a given board has ACPI table support.
525 It is usually set in mainboard/*/Kconfig.
Myles Watsonb8e20272009-10-15 13:35:47 +0000526
527config HAVE_MP_TABLE
528 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000529 help
530 This variable specifies whether a given board has MP table support.
531 It is usually set in mainboard/*/Kconfig.
532 Whether or not the MP table is actually generated by coreboot
533 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000534
535config HAVE_PIRQ_TABLE
536 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000537 help
538 This variable specifies whether a given board has PIRQ table support.
539 It is usually set in mainboard/*/Kconfig.
540 Whether or not the PIRQ table is actually generated by coreboot
541 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000542
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -0500543config MAX_PIRQ_LINKS
544 int
545 default 4
546 help
547 This variable specifies the number of PIRQ interrupt links which are
548 routable. On most chipsets, this is 4, INTA through INTD. Some
549 chipsets offer more than four links, commonly up to INTH. They may
550 also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
551 table specifies links greater than 4, pirq_route_irqs will not
552 function properly, unless this variable is correctly set.
553
Vladimir Serbinenkoc21e0732014-10-16 12:48:19 +0200554config COMMON_FADT
555 bool
556 default n
557
Aaron Durbin9420a522015-11-17 16:31:00 -0600558config ACPI_NHLT
559 bool
560 default n
561 help
562 Build support for NHLT (non HD Audio) ACPI table generation.
563
Myles Watsond73c1b52009-10-26 15:14:07 +0000564#These Options are here to avoid "undefined" warnings.
565#The actual selection and help texts are in the following menu.
566
Uwe Hermann168b11b2009-10-07 16:15:40 +0000567menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000568
Myles Watsonb8e20272009-10-15 13:35:47 +0000569config GENERATE_MP_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800570 prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
571 bool
572 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000573 help
574 Generate an MP table (conforming to the Intel MultiProcessor
575 specification 1.4) for this board.
576
577 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000578
Myles Watsonb8e20272009-10-15 13:35:47 +0000579config GENERATE_PIRQ_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800580 prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE
581 bool
582 default HAVE_PIRQ_TABLE
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000583 help
584 Generate a PIRQ table for this board.
585
586 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000587
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200588config GENERATE_SMBIOS_TABLES
589 depends on ARCH_X86
590 bool "Generate SMBIOS tables"
591 default y
592 help
593 Generate SMBIOS tables for this board.
594
595 If unsure, say Y.
596
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200597config SMBIOS_PROVIDED_BY_MOBO
598 bool
599 default n
600
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200601config MAINBOARD_SERIAL_NUMBER
602 string "SMBIOS Serial Number"
603 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200604 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200605 default "123456789"
Martin Roth595e7772015-04-26 18:53:26 -0600606 help
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200607 The Serial Number to store in SMBIOS structures.
608
609config MAINBOARD_VERSION
610 string "SMBIOS Version Number"
611 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200612 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200613 default "1.0"
614 help
615 The Version Number to store in SMBIOS structures.
616
617config MAINBOARD_SMBIOS_MANUFACTURER
618 string "SMBIOS Manufacturer"
619 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200620 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200621 default MAINBOARD_VENDOR
622 help
623 Override the default Manufacturer stored in SMBIOS structures.
624
625config MAINBOARD_SMBIOS_PRODUCT_NAME
626 string "SMBIOS Product name"
627 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200628 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200629 default MAINBOARD_PART_NUMBER
630 help
631 Override the default Product name stored in SMBIOS structures.
632
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100633config SMBIOS_ENCLOSURE_TYPE
634 hex
635 depends on GENERATE_SMBIOS_TABLES
636 default 0x09 if SYSTEM_TYPE_LAPTOP
637 default 0x03
638 help
639 System Enclosure or Chassis Types as defined in SMBIOS specification.
640 The default value is SMBIOS_ENCLOSURE_DESKTOP (0x03) or
641 SMBIOS_ENCLOSURE_LAPTOP (0x09) if SYSTEM_TYPE_LAPTOP is set.
642
Myles Watson45bb25f2009-09-22 18:49:08 +0000643endmenu
644
Martin Roth21c06502016-02-04 19:52:27 -0700645source "payloads/Kconfig"
Peter Stugea758ca22009-09-17 16:21:31 +0000646
Uwe Hermann168b11b2009-10-07 16:15:40 +0000647menu "Debugging"
648
649# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000650config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000651 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200652 default n
Denis 'GNUtoo' Carikli3747ba12015-12-10 22:04:56 +0100653 depends on CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +0000654 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000655 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000656 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000657
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200658config GDB_WAIT
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100659 bool "Wait for a GDB connection in the ramstage"
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200660 default n
661 depends on GDB_STUB
662 help
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100663 If enabled, coreboot will wait for a GDB connection in the ramstage.
664
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200665
Julius Wernerd82e0cf2015-02-17 17:27:23 -0800666config FATAL_ASSERTS
667 bool "Halt when hitting a BUG() or assertion error"
668 default n
669 help
670 If enabled, coreboot will call hlt() on a BUG() or failed ASSERT().
671
Stefan Reinauerfe422182012-05-02 16:33:18 -0700672config DEBUG_CBFS
673 bool "Output verbose CBFS debug messages"
674 default n
Stefan Reinauerfe422182012-05-02 16:33:18 -0700675 help
676 This option enables additional CBFS related debug messages.
677
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000678config HAVE_DEBUG_RAM_SETUP
679 def_bool n
680
Uwe Hermann01ce6012010-03-05 10:03:50 +0000681config DEBUG_RAM_SETUP
682 bool "Output verbose RAM init debug messages"
683 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000684 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000685 help
686 This option enables additional RAM init related debug messages.
687 It is recommended to enable this when debugging issues on your
688 board which might be RAM init related.
689
690 Note: This option will increase the size of the coreboot image.
691
692 If unsure, say N.
693
Patrick Georgie82618d2010-10-01 14:50:12 +0000694config HAVE_DEBUG_CAR
695 def_bool n
696
Peter Stuge5015f792010-11-10 02:00:32 +0000697config DEBUG_CAR
698 def_bool n
699 depends on HAVE_DEBUG_CAR
700
701if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermanna953f372010-11-10 00:14:32 +0000702# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
703# printk(BIOS_DEBUG, ...) calls.
Patrick Georgie82618d2010-10-01 14:50:12 +0000704config DEBUG_CAR
705 bool "Output verbose Cache-as-RAM debug messages"
706 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000707 depends on HAVE_DEBUG_CAR
Patrick Georgie82618d2010-10-01 14:50:12 +0000708 help
709 This option enables additional CAR related debug messages.
Peter Stuge5015f792010-11-10 02:00:32 +0000710endif
Patrick Georgie82618d2010-10-01 14:50:12 +0000711
Myles Watson80e914f2010-06-01 19:25:31 +0000712config DEBUG_PIRQ
713 bool "Check PIRQ table consistency"
714 default n
715 depends on GENERATE_PIRQ_TABLE
716 help
717 If unsure, say N.
718
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000719config HAVE_DEBUG_SMBUS
720 def_bool n
721
Uwe Hermann01ce6012010-03-05 10:03:50 +0000722config DEBUG_SMBUS
723 bool "Output verbose SMBus debug messages"
724 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000725 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000726 help
727 This option enables additional SMBus (and SPD) debug messages.
728
729 Note: This option will increase the size of the coreboot image.
730
731 If unsure, say N.
732
733config DEBUG_SMI
734 bool "Output verbose SMI debug messages"
735 default n
736 depends on HAVE_SMI_HANDLER
Martin Roth3a543182015-09-28 15:27:24 -0600737 select SPI_FLASH_SMM if SPI_CONSOLE
Uwe Hermann01ce6012010-03-05 10:03:50 +0000738 help
739 This option enables additional SMI related debug messages.
740
741 Note: This option will increase the size of the coreboot image.
742
743 If unsure, say N.
744
Stefan Reinauerbc0f7a62010-08-01 15:41:14 +0000745config DEBUG_SMM_RELOCATION
746 bool "Debug SMM relocation code"
747 default n
748 depends on HAVE_SMI_HANDLER
749 help
750 This option enables additional SMM handler relocation related
751 debug messages.
752
753 Note: This option will increase the size of the coreboot image.
754
755 If unsure, say N.
756
Uwe Hermanna953f372010-11-10 00:14:32 +0000757# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
758# printk(BIOS_DEBUG, ...) calls.
759config DEBUG_MALLOC
Stefan Reinauer95a63962012-11-13 17:00:01 -0800760 prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
761 bool
Uwe Hermanna953f372010-11-10 00:14:32 +0000762 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000763 help
764 This option enables additional malloc related debug messages.
765
766 Note: This option will increase the size of the coreboot image.
767
768 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300769
770# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
771# printk(BIOS_DEBUG, ...) calls.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300772config DEBUG_ACPI
Stefan Reinauer95a63962012-11-13 17:00:01 -0800773 prompt "Output verbose ACPI debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
774 bool
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300775 default n
776 help
777 This option enables additional ACPI related debug messages.
778
779 Note: This option will slightly increase the size of the coreboot image.
780
781 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300782
Uwe Hermanna953f372010-11-10 00:14:32 +0000783# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
784# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000785config REALMODE_DEBUG
Stefan Reinauer95a63962012-11-13 17:00:01 -0800786 prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
787 bool
Myles Watson6c9bc012010-09-07 22:30:15 +0000788 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000789 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000790 help
791 This option enables additional x86emu related debug messages.
792
793 Note: This option will increase the time to emulate a ROM.
794
795 If unsure, say N.
796
Uwe Hermann01ce6012010-03-05 10:03:50 +0000797config X86EMU_DEBUG
798 bool "Output verbose x86emu debug messages"
799 default n
800 depends on PCI_OPTION_ROM_RUN_YABEL
801 help
802 This option enables additional x86emu related debug messages.
803
804 Note: This option will increase the size of the coreboot image.
805
806 If unsure, say N.
807
808config X86EMU_DEBUG_JMP
809 bool "Trace JMP/RETF"
810 default n
811 depends on X86EMU_DEBUG
812 help
813 Print information about JMP and RETF opcodes from x86emu.
814
815 Note: This option will increase the size of the coreboot image.
816
817 If unsure, say N.
818
819config X86EMU_DEBUG_TRACE
820 bool "Trace all opcodes"
821 default n
822 depends on X86EMU_DEBUG
823 help
824 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000825
Uwe Hermann01ce6012010-03-05 10:03:50 +0000826 WARNING: This will produce a LOT of output and take a long time.
827
828 Note: This option will increase the size of the coreboot image.
829
830 If unsure, say N.
831
832config X86EMU_DEBUG_PNP
833 bool "Log Plug&Play accesses"
834 default n
835 depends on X86EMU_DEBUG
836 help
837 Print Plug And Play accesses made by option ROMs.
838
839 Note: This option will increase the size of the coreboot image.
840
841 If unsure, say N.
842
843config X86EMU_DEBUG_DISK
844 bool "Log Disk I/O"
845 default n
846 depends on X86EMU_DEBUG
847 help
848 Print Disk I/O related messages.
849
850 Note: This option will increase the size of the coreboot image.
851
852 If unsure, say N.
853
854config X86EMU_DEBUG_PMM
855 bool "Log PMM"
856 default n
857 depends on X86EMU_DEBUG
858 help
859 Print messages related to POST Memory Manager (PMM).
860
861 Note: This option will increase the size of the coreboot image.
862
863 If unsure, say N.
864
865
866config X86EMU_DEBUG_VBE
867 bool "Debug VESA BIOS Extensions"
868 default n
869 depends on X86EMU_DEBUG
870 help
871 Print messages related to VESA BIOS Extension (VBE) functions.
872
873 Note: This option will increase the size of the coreboot image.
874
875 If unsure, say N.
876
877config X86EMU_DEBUG_INT10
878 bool "Redirect INT10 output to console"
879 default n
880 depends on X86EMU_DEBUG
881 help
882 Let INT10 (i.e. character output) calls print messages to debug output.
883
884 Note: This option will increase the size of the coreboot image.
885
886 If unsure, say N.
887
888config X86EMU_DEBUG_INTERRUPTS
889 bool "Log intXX calls"
890 default n
891 depends on X86EMU_DEBUG
892 help
893 Print messages related to interrupt handling.
894
895 Note: This option will increase the size of the coreboot image.
896
897 If unsure, say N.
898
899config X86EMU_DEBUG_CHECK_VMEM_ACCESS
900 bool "Log special memory accesses"
901 default n
902 depends on X86EMU_DEBUG
903 help
904 Print messages related to accesses to certain areas of the virtual
905 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
906
907 Note: This option will increase the size of the coreboot image.
908
909 If unsure, say N.
910
911config X86EMU_DEBUG_MEM
912 bool "Log all memory accesses"
913 default n
914 depends on X86EMU_DEBUG
915 help
916 Print memory accesses made by option ROM.
917 Note: This also includes accesses to fetch instructions.
918
919 Note: This option will increase the size of the coreboot image.
920
921 If unsure, say N.
922
923config X86EMU_DEBUG_IO
924 bool "Log IO accesses"
925 default n
926 depends on X86EMU_DEBUG
927 help
928 Print I/O accesses made by option ROM.
929
930 Note: This option will increase the size of the coreboot image.
931
932 If unsure, say N.
933
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +0200934config X86EMU_DEBUG_TIMINGS
935 bool "Output timing information"
936 default n
937 depends on X86EMU_DEBUG && UDELAY_LAPIC && HAVE_MONOTONIC_TIMER
938 help
939 Print timing information needed by i915tool.
940
941 If unsure, say N.
942
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -0700943config DEBUG_SPI_FLASH
944 bool "Output verbose SPI flash debug messages"
945 default n
946 depends on SPI_FLASH
947 help
948 This option enables additional SPI flash related debug messages.
949
Kyösti Mälkki3be80cc2013-06-06 10:46:37 +0300950config DEBUG_USBDEBUG
951 bool "Output verbose USB 2.0 EHCI debug dongle messages"
952 default n
953 depends on USBDEBUG
954 help
955 This option enables additional USB 2.0 debug dongle related messages.
956
957 Select this to debug the connection of usbdebug dongle. Note that
958 you need some other working console to receive the messages.
959
Stefan Reinauer8e073822012-04-04 00:07:22 +0200960if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
961# Only visible with the right southbridge and loglevel.
962config DEBUG_INTEL_ME
963 bool "Verbose logging for Intel Management Engine"
964 default n
965 help
966 Enable verbose logging for Intel Management Engine driver that
967 is present on Intel 6-series chipsets.
968endif
969
Rudolf Marek7f0e9302011-09-02 23:23:41 +0200970config TRACE
971 bool "Trace function calls"
972 default n
973 help
974 If enabled, every function will print information to console once
975 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
976 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
Ben Gardner8420ad42015-11-18 10:46:53 -0600977 of calling function. Please note some printk related functions
Rudolf Marek7f0e9302011-09-02 23:23:41 +0200978 are omitted from trace to have good looking console dumps.
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800979
980config DEBUG_COVERAGE
981 bool "Debug code coverage"
982 default n
983 depends on COVERAGE
984 help
985 If enabled, the code coverage hooks in coreboot will output some
986 information about the coverage data that is dumped.
987
Jonathan Neuschäferfc04f9b2016-06-29 21:59:32 +0200988config DEBUG_BOOT_STATE
989 bool "Debug boot state machine"
990 default n
991 help
992 Control debugging of the boot state machine. When selected displays
993 the state boundaries in ramstage.
994
Nico Hubere84e62542016-10-05 17:43:56 +0200995config DEBUG_ADA_CODE
996 bool "Compile debug code in Ada sources"
997 default n
998 help
999 Add the compiler switch `-gnata` to compile code guarded by
1000 `pragma Debug`.
1001
Uwe Hermann168b11b2009-10-07 16:15:40 +00001002endmenu
1003
Martin Roth8e4aafb2016-12-15 15:25:15 -07001004
1005###############################################################################
1006# Set variables with no prompt - these can be set anywhere, and putting at
1007# the end of this file gives the most flexibility.
Nico Huber3db76532017-05-18 18:07:34 +02001008
1009source "src/lib/Kconfig"
1010
Myles Watsond73c1b52009-10-26 15:14:07 +00001011config ENABLE_APIC_EXT_ID
1012 bool
1013 default n
Myles Watson2e672732009-11-12 16:38:03 +00001014
1015config WARNINGS_ARE_ERRORS
1016 bool
Edward O'Callaghan63f6dc72014-11-18 03:17:54 +11001017 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001018
Peter Stuge51eafde2010-10-13 06:23:02 +00001019# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1020# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1021# mutually exclusive. One of these options must be selected in the
1022# mainboard Kconfig if the chipset supports enabling and disabling of
1023# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1024# in mainboard/Kconfig to know if the button should be enabled or not.
1025
1026config POWER_BUTTON_DEFAULT_ENABLE
1027 def_bool n
1028 help
1029 Select when the board has a power button which can optionally be
1030 disabled by the user.
1031
1032config POWER_BUTTON_DEFAULT_DISABLE
1033 def_bool n
1034 help
1035 Select when the board has a power button which can optionally be
1036 enabled by the user, e.g. when the board ships with a jumper over
1037 the power switch contacts.
1038
1039config POWER_BUTTON_FORCE_ENABLE
1040 def_bool n
1041 help
1042 Select when the board requires that the power button is always
1043 enabled.
1044
1045config POWER_BUTTON_FORCE_DISABLE
1046 def_bool n
1047 help
1048 Select when the board requires that the power button is always
1049 disabled, e.g. when it has been hardwired to ground.
1050
1051config POWER_BUTTON_IS_OPTIONAL
1052 bool
1053 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1054 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1055 help
1056 Internal option that controls ENABLE_POWER_BUTTON visibility.
Duncan Laurie72748002013-10-31 08:26:23 -07001057
1058config REG_SCRIPT
1059 bool
Duncan Laurie72748002013-10-31 08:26:23 -07001060 default n
1061 help
1062 Internal option that controls whether we compile in register scripts.
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001063
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001064config MAX_REBOOT_CNT
1065 int
1066 default 3
Timothy Pearson17ada2e2015-03-18 01:31:34 -05001067 help
1068 Internal option that sets the maximum number of bootblock executions allowed
1069 with the normal image enabled before assuming the normal image is defective
Vadim Bendebury9c9c3362014-07-23 09:40:02 -07001070 and switching to the fallback image.
Martin Roth59ff3402016-02-09 09:06:46 -07001071
Lee Leahyfc3741f2016-05-26 17:12:17 -07001072config CREATE_BOARD_CHECKLIST
1073 bool
1074 default n
1075 help
1076 When selected, creates a webpage showing the implementation status for
1077 the board. Routines highlighted in green are complete, yellow are
1078 optional and red are required and must be implemented. A table is
1079 produced for each stage of the boot process except the bootblock. The
1080 red items may be used as an implementation checklist for the board.
1081
1082config MAKE_CHECKLIST_PUBLIC
1083 bool
1084 default n
1085 help
1086 When selected, build/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
1087 is copied into the Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board
1088 directory.
1089
1090config CHECKLIST_DATA_FILE_LOCATION
1091 string
1092 help
1093 Location of the <stage>_complete.dat and <stage>_optional.dat files
1094 that are consumed during checklist processing. <stage>_complete.dat
1095 contains the symbols that are expected to be in the resulting image.
1096 <stage>_optional.dat is a subset of <stage>_complete.dat and contains
1097 a list of weak symbols which the resulting image may consume. Other
1098 symbols contained only in <stage>_complete.dat will be flagged as
1099 required and not implemented if a weak implementation is found in the
1100 resulting image.
Nico Hubere0ed9022016-10-07 12:58:17 +02001101
Martin Roth8e4aafb2016-12-15 15:25:15 -07001102config UNCOMPRESSED_RAMSTAGE
1103 bool
1104
1105config NO_XIP_EARLY_STAGES
1106 bool
1107 default n if ARCH_X86
1108 default y
1109 help
1110 Identify if early stages are eXecute-In-Place(XIP).
1111
1112config EARLY_CBMEM_INIT
1113 def_bool !LATE_CBMEM_INIT
1114
1115config EARLY_CBMEM_LIST
1116 bool
1117 default n
1118 help
1119 Enable display of CBMEM during romstage and postcar.
1120
1121config RELOCATABLE_MODULES
1122 bool
1123 help
1124 If RELOCATABLE_MODULES is selected then support is enabled for
1125 building relocatable modules in the RAM stage. Those modules can be
1126 loaded anywhere and all the relocations are handled automatically.
1127
1128config NO_STAGE_CACHE
1129 bool
1130 help
1131 Do not save any component in stage cache for resume path. On resume,
1132 all components would be read back from CBFS again.
1133
1134config GENERIC_GPIO_LIB
1135 bool
1136 help
1137 If enabled, compile the generic GPIO library. A "generic" GPIO
1138 implies configurability usually found on SoCs, particularly the
1139 ability to control internal pull resistors.
1140
1141config GENERIC_SPD_BIN
1142 bool
1143 help
1144 If enabled, add support for adding spd.hex files in cbfs as spd.bin
1145 and locating it runtime to load SPD. Additionally provide provision to
1146 fetch SPD over SMBus.
1147
1148config DIMM_MAX
1149 int
1150 default 4
1151 depends on GENERIC_SPD_BIN
1152 help
1153 Total number of memory DIMM slots available on motherboard.
1154 It is multiplication of number of channel to number of DIMMs per
1155 channel
1156
1157config DIMM_SPD_SIZE
1158 int
1159 default 256
Martin Roth8e4aafb2016-12-15 15:25:15 -07001160 help
1161 Total SPD size that will be used for DIMM.
1162 Ex: DDR3 256, DDR4 512.
1163
Kane Chen66f1f382017-10-16 19:40:18 +08001164config SPD_READ_BY_WORD
1165 bool
1166
Martin Roth8e4aafb2016-12-15 15:25:15 -07001167config BOOTBLOCK_CUSTOM
1168 # To be selected by arch, SoC or mainboard if it does not want use the normal
1169 # src/lib/bootblock.c#main() C entry point.
1170 bool
1171
1172config C_ENVIRONMENT_BOOTBLOCK
1173 # To be selected by arch or platform if a C environment is available during the
1174 # bootblock. Normally this signifies availability of RW memory (e.g. SRAM).
1175 bool
1176
Martin Roth75e5cb72016-12-15 15:05:37 -07001177###############################################################################
1178# Set default values for symbols created before mainboards. This allows the
1179# option to be displayed in the general menu, but the default to be loaded in
1180# the mainboard if desired.
1181config COMPRESS_RAMSTAGE
1182 default y if !UNCOMPRESSED_RAMSTAGE
1183
1184config COMPRESS_PRERAM_STAGES
1185 depends on !ARCH_X86
1186 default y
1187
1188config INCLUDE_CONFIG_FILE
1189 default y
1190
Martin Roth75e5cb72016-12-15 15:05:37 -07001191config BOOTSPLASH_FILE
1192 depends on BOOTSPLASH_IMAGE
1193 default "bootsplash.jpg"
1194
1195config CBFS_SIZE
1196 default ROM_SIZE