Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 AMD |
| 5 | * Written by Yinghai Lu <yinghailu@amd.com> for AMD. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 18 | #include <console/console.h> |
| 19 | #include <device/pci.h> |
| 20 | #include <string.h> |
| 21 | #include <stdint.h> |
| 22 | #include <arch/pirq_routing.h> |
| 23 | |
| 24 | #include <cpu/amd/amdk8_sysconf.h> |
| 25 | #include "mb_sysconf.h" |
| 26 | |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 27 | static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, |
| 28 | uint8_t devfn, uint8_t link0, uint16_t bitmap0, |
| 29 | uint8_t link1, uint16_t bitmap1, uint8_t link2, |
| 30 | uint16_t bitmap2, uint8_t link3, uint16_t bitmap3, |
| 31 | uint8_t slot, uint8_t rfu) |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 32 | { |
| 33 | pirq_info->bus = bus; |
| 34 | pirq_info->devfn = devfn; |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 35 | pirq_info->irq[0].link = link0; |
| 36 | pirq_info->irq[0].bitmap = bitmap0; |
| 37 | pirq_info->irq[1].link = link1; |
| 38 | pirq_info->irq[1].bitmap = bitmap1; |
| 39 | pirq_info->irq[2].link = link2; |
| 40 | pirq_info->irq[2].bitmap = bitmap2; |
| 41 | pirq_info->irq[3].link = link3; |
| 42 | pirq_info->irq[3].bitmap = bitmap3; |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 43 | pirq_info->slot = slot; |
| 44 | pirq_info->rfu = rfu; |
| 45 | } |
| 46 | |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 47 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 48 | { |
| 49 | |
| 50 | struct irq_routing_table *pirq; |
| 51 | struct irq_info *pirq_info; |
| 52 | unsigned slot_num; |
| 53 | uint8_t *v; |
| 54 | struct mb_sysconf_t *m; |
| 55 | unsigned sbdn; |
| 56 | |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 57 | uint8_t sum = 0; |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 58 | int i; |
| 59 | |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 60 | get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 61 | sbdn = sysconf.sbdn; |
| 62 | m = sysconf.mb; |
| 63 | |
| 64 | /* Align the table to be 16 byte aligned. */ |
| 65 | addr += 15; |
| 66 | addr &= ~15; |
| 67 | |
| 68 | /* This table must be between 0xf0000 & 0x100000 */ |
| 69 | printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr); |
| 70 | |
| 71 | pirq = (void *)(addr); |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 72 | v = (uint8_t *) (addr); |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 73 | |
| 74 | pirq->signature = PIRQ_SIGNATURE; |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 75 | pirq->version = PIRQ_VERSION; |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 76 | |
| 77 | pirq->rtr_bus = m->bus_mcp55; |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 78 | pirq->rtr_devfn = ((sbdn + 6) << 3) | 0; |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 79 | |
| 80 | pirq->exclusive_irqs = 0; |
| 81 | |
| 82 | pirq->rtr_vendor = 0x10de; |
| 83 | pirq->rtr_device = 0x0370; |
| 84 | |
| 85 | pirq->miniport_data = 0; |
| 86 | |
| 87 | memset(pirq->rfu, 0, sizeof(pirq->rfu)); |
| 88 | |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 89 | pirq_info = (void *)(&pirq->checksum + 1); |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 90 | slot_num = 0; |
| 91 | //pci bridge |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 92 | write_pirq_info(pirq_info, m->bus_mcp55, ((sbdn + 6) << 3) | 0, 0x1, |
| 93 | 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); |
| 94 | pirq_info++; |
| 95 | slot_num++; |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 96 | |
| 97 | for (i = 1; i < sysconf.hc_possible_num; i++) { |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 98 | if (!(sysconf.pci1234[i] & 0x1)) |
| 99 | continue; |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 100 | unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff; |
| 101 | unsigned devn = sysconf.hcdn[i] & 0xff; |
| 102 | |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 103 | write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8, |
| 104 | 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); |
| 105 | pirq_info++; |
| 106 | slot_num++; |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | pirq->size = 32 + 16 * slot_num; |
| 110 | |
| 111 | for (i = 0; i < pirq->size; i++) |
| 112 | sum += v[i]; |
| 113 | |
| 114 | sum = pirq->checksum - sum; |
| 115 | |
| 116 | if (sum != pirq->checksum) { |
| 117 | pirq->checksum = sum; |
| 118 | } |
| 119 | |
| 120 | printk(BIOS_INFO, "done.\n"); |
| 121 | |
Paul Menzel | 95fe8fb | 2016-07-28 17:20:20 +0200 | [diff] [blame^] | 122 | return (unsigned long)pirq_info; |
Jonathan A. Kollasch | d924782 | 2015-10-30 18:15:55 -0500 | [diff] [blame] | 123 | |
| 124 | } |