| Furquan Shaikh | 2af76f4 | 2014-04-28 16:39:40 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Memory map: |
| 3 | * |
| 4 | * CONFIG_RAMBASE : text segment |
| 5 | * : rodata segment |
| 6 | * : data segment |
| 7 | * : bss segment |
| 8 | * : stack |
| 9 | * : heap |
| 10 | */ |
| 11 | /* |
| 12 | * Copyright 2013 Google Inc. |
| 13 | * Bootstrap code for the STPC Consumer |
| 14 | * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. |
| 15 | */ |
| 16 | |
| 17 | /* |
| 18 | * Written by Johan Rydberg, based on work by Daniel Kahlin. |
| 19 | * Rewritten by Eric Biederman |
| 20 | * 2005.12 yhlu add ramstage cross the vga font buffer handling |
| 21 | */ |
| 22 | |
| 23 | /* We use ELF as output format. So that we can debug the code in some form. */ |
| 24 | INCLUDE ldoptions |
| 25 | |
| 26 | ENTRY(stage_entry) |
| 27 | |
| 28 | PHDRS |
| 29 | { |
| 30 | to_load PT_LOAD; |
| 31 | } |
| 32 | |
| 33 | SECTIONS |
| 34 | { |
| 35 | . = CONFIG_SYS_SDRAM_BASE; |
| 36 | /* First we place the code and read only data (typically const declared). |
| 37 | * This could theoretically be placed in rom. |
| 38 | */ |
| 39 | .text : { |
| 40 | _text = .; |
| 41 | _start = .; |
| 42 | *(.text.stage_entry.aarch64); |
| 43 | *(.text); |
| 44 | *(.text.*); |
| 45 | . = ALIGN(16); |
| 46 | _etext = .; |
| 47 | } : to_load |
| 48 | |
| 49 | .ctors : { |
| 50 | . = ALIGN(0x100); |
| 51 | __CTOR_LIST__ = .; |
| 52 | *(.ctors); |
| 53 | LONG(0); |
| 54 | __CTOR_END__ = .; |
| 55 | } |
| 56 | |
| 57 | .rodata : { |
| 58 | _rodata = .; |
| 59 | . = ALIGN(4); |
| 60 | console_drivers = .; |
| 61 | *(.rodata.console_drivers) |
| 62 | econsole_drivers = . ; |
| 63 | . = ALIGN(4); |
| 64 | pci_drivers = . ; |
| 65 | *(.rodata.pci_driver) |
| 66 | epci_drivers = . ; |
| 67 | cpu_drivers = . ; |
| 68 | *(.rodata.cpu_driver) |
| 69 | ecpu_drivers = . ; |
| 70 | _bs_init_begin = .; |
| 71 | *(.bs_init) |
| 72 | _bs_init_end = .; |
| 73 | *(.rodata) |
| 74 | *(.rodata.*) |
| 75 | /* kevinh/Ispiri - Added an align, because the objcopy tool |
| 76 | * incorrectly converts sections that are not long word aligned. |
| 77 | */ |
| 78 | . = ALIGN(4); |
| 79 | |
| 80 | _erodata = .; |
| 81 | } |
| 82 | /* After the code we place initialized data (typically initialized |
| 83 | * global variables). This gets copied into ram by startup code. |
| 84 | * __data_start and __data_end shows where in ram this should be placed, |
| 85 | * whereas __data_loadstart and __data_loadend shows where in rom to |
| 86 | * copy from. |
| 87 | */ |
| 88 | .data : { |
| 89 | _data = .; |
| 90 | *(.data) |
| 91 | _edata = .; |
| 92 | } |
| 93 | |
| 94 | /* bss does not contain data, it is just a space that should be zero |
| 95 | * initialized on startup. (typically uninitialized global variables) |
| 96 | * crt0.S fills between _bss and _ebss with zeroes. |
| 97 | */ |
| 98 | _bss = .; |
| 99 | .bss . : { |
| 100 | *(.bss) |
| 101 | *(.sbss) |
| 102 | *(COMMON) |
| 103 | } |
| 104 | _ebss = .; |
| 105 | _end = .; |
| 106 | |
| 107 | /* coreboot really "ends" here. Only heap and stack are placed after |
| 108 | * this line. |
| 109 | */ |
| 110 | |
| 111 | _heap = .; |
| 112 | .heap . : { |
| 113 | /* Reserve CONFIG_HEAP_SIZE bytes for the heap */ |
| 114 | . = CONFIG_HEAP_SIZE ; |
| 115 | . = ALIGN(4); |
| 116 | } |
| 117 | _eheap = .; |
| 118 | |
| 119 | _stack = CONFIG_STACK_BOTTOM; |
| 120 | _estack = CONFIG_STACK_TOP; |
| 121 | |
| 122 | /* The ram segment. This includes all memory used by the memory |
| 123 | * resident copy of coreboot, except the tables that are produced on |
| 124 | * the fly, but including stack and heap. |
| 125 | */ |
| 126 | _ram_seg = _text; |
| 127 | _eram_seg = _eheap; |
| 128 | |
| 129 | /* Discard the sections we don't need/want */ |
| 130 | |
| 131 | /DISCARD/ : { |
| 132 | *(.comment) |
| 133 | *(.note) |
| 134 | *(.note.*) |
| 135 | } |
| 136 | } |