Marc Jones | 352ca5b | 2021-03-18 17:01:06 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <bootstate.h> |
| 4 | #include <console/console.h> |
| 5 | #include <console/debug.h> |
| 6 | #include <cpu/x86/smm.h> |
Marc Jones | d77b97d | 2021-04-06 15:28:40 -0600 | [diff] [blame] | 7 | #include <device/pci.h> |
| 8 | #include <intelpch/lockdown.h> |
| 9 | #include <soc/pci_devs.h> |
Michael Niewöhner | 6b93866 | 2021-09-24 23:57:37 +0200 | [diff] [blame] | 10 | #include <soc/pm.h> |
Marc Jones | d77b97d | 2021-04-06 15:28:40 -0600 | [diff] [blame] | 11 | #include <soc/util.h> |
| 12 | |
| 13 | #include "chip.h" |
| 14 | |
| 15 | static void lock_pam0123(void) |
| 16 | { |
| 17 | const struct device *dev; |
| 18 | |
| 19 | if (get_lockdown_config() != CHIPSET_LOCKDOWN_COREBOOT) |
| 20 | return; |
| 21 | |
| 22 | dev = pcidev_path_on_bus(get_stack_busno(1), PCI_DEVFN(SAD_ALL_DEV, SAD_ALL_FUNC)); |
| 23 | pci_or_config32(dev, SAD_ALL_PAM0123_CSR, PAM_LOCK); |
| 24 | } |
Marc Jones | 352ca5b | 2021-03-18 17:01:06 -0600 | [diff] [blame] | 25 | |
| 26 | static void soc_finalize(void *unused) |
| 27 | { |
| 28 | printk(BIOS_DEBUG, "Finalizing chipset.\n"); |
| 29 | |
Michael Niewöhner | 6b93866 | 2021-09-24 23:57:37 +0200 | [diff] [blame] | 30 | /* |
| 31 | * Disable ACPI PM timer based on Kconfig |
| 32 | * |
| 33 | * Disabling ACPI PM timer is necessary for XTAL OSC shutdown. |
| 34 | * Disabling ACPI PM timer also switches off TCO. |
| 35 | * |
| 36 | * Note: In contrast to other platforms supporting PM timer emulation, |
| 37 | * disabling the PM timer must be done *after* FSP has run on Xeon-SP, |
| 38 | * because FSP makes use of the PM timer. |
| 39 | */ |
| 40 | if (!CONFIG(USE_PM_ACPI_TIMER)) |
| 41 | setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); |
| 42 | |
Marc Jones | 352ca5b | 2021-03-18 17:01:06 -0600 | [diff] [blame] | 43 | apm_control(APM_CNT_FINALIZE); |
Marc Jones | d77b97d | 2021-04-06 15:28:40 -0600 | [diff] [blame] | 44 | lock_pam0123(); |
Marc Jones | 352ca5b | 2021-03-18 17:01:06 -0600 | [diff] [blame] | 45 | |
| 46 | post_code(POST_OS_BOOT); |
| 47 | } |
| 48 | |
| 49 | BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_ENTRY, soc_finalize, NULL); |