Zheng Bao | 1ad9f29 | 2010-04-23 17:37:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <device/pci.h> |
| 22 | #include <string.h> |
| 23 | #include <stdint.h> |
| 24 | #include <arch/pirq_routing.h> |
| 25 | |
| 26 | #include <cpu/amd/amdfam10_sysconf.h> |
| 27 | |
| 28 | |
| 29 | |
| 30 | static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, |
| 31 | u8 link0, u16 bitmap0, u8 link1, u16 bitmap1, |
| 32 | u8 link2, u16 bitmap2, u8 link3, u16 bitmap3, |
| 33 | u8 slot, u8 rfu) |
| 34 | { |
| 35 | pirq_info->bus = bus; |
| 36 | pirq_info->devfn = devfn; |
| 37 | pirq_info->irq[0].link = link0; |
| 38 | pirq_info->irq[0].bitmap = bitmap0; |
| 39 | pirq_info->irq[1].link = link1; |
| 40 | pirq_info->irq[1].bitmap = bitmap1; |
| 41 | pirq_info->irq[2].link = link2; |
| 42 | pirq_info->irq[2].bitmap = bitmap2; |
| 43 | pirq_info->irq[3].link = link3; |
| 44 | pirq_info->irq[3].bitmap = bitmap3; |
| 45 | pirq_info->slot = slot; |
| 46 | pirq_info->rfu = rfu; |
| 47 | } |
Zheng Bao | 1ad9f29 | 2010-04-23 17:37:41 +0000 | [diff] [blame] | 48 | extern u8 bus_rs780[8]; |
| 49 | extern u8 bus_sb700[2]; |
| 50 | extern unsigned long sbdn_sb700; |
| 51 | |
| 52 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 53 | { |
| 54 | struct irq_routing_table *pirq; |
| 55 | struct irq_info *pirq_info; |
| 56 | u32 slot_num; |
| 57 | u8 *v; |
| 58 | |
| 59 | u8 sum = 0; |
| 60 | int i; |
| 61 | |
| 62 | get_bus_conf(); /* it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c */ |
| 63 | |
| 64 | /* Align the table to be 16 byte aligned. */ |
| 65 | addr += 15; |
| 66 | addr &= ~15; |
| 67 | |
| 68 | /* This table must be betweeen 0xf0000 & 0x100000 */ |
| 69 | printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr); |
| 70 | |
| 71 | pirq = (void *)(addr); |
| 72 | v = (u8 *) (addr); |
| 73 | |
| 74 | pirq->signature = PIRQ_SIGNATURE; |
| 75 | pirq->version = PIRQ_VERSION; |
| 76 | |
| 77 | pirq->rtr_bus = bus_sb700[0]; |
| 78 | pirq->rtr_devfn = ((sbdn_sb700 + 0x14) << 3) | 4; |
| 79 | |
| 80 | pirq->exclusive_irqs = 0; |
| 81 | |
| 82 | pirq->rtr_vendor = 0x1002; |
| 83 | pirq->rtr_device = 0x4384; |
| 84 | |
| 85 | pirq->miniport_data = 0; |
| 86 | |
| 87 | memset(pirq->rfu, 0, sizeof(pirq->rfu)); |
| 88 | |
| 89 | pirq_info = (void *)(&pirq->checksum + 1); |
| 90 | slot_num = 0; |
| 91 | |
| 92 | /* pci bridge */ |
| 93 | write_pirq_info(pirq_info, bus_sb700[0], ((sbdn_sb700 + 0x14) << 3) | 4, |
| 94 | 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, |
| 95 | 0); |
| 96 | pirq_info++; |
| 97 | slot_num++; |
| 98 | |
| 99 | pirq->size = 32 + 16 * slot_num; |
| 100 | |
| 101 | for (i = 0; i < pirq->size; i++) |
| 102 | sum += v[i]; |
| 103 | |
| 104 | sum = pirq->checksum - sum; |
| 105 | if (sum != pirq->checksum) { |
| 106 | pirq->checksum = sum; |
| 107 | } |
| 108 | |
| 109 | printk(BIOS_INFO, "write_pirq_routing_table done.\n"); |
| 110 | |
| 111 | return (unsigned long)pirq_info; |
| 112 | } |