blob: caf91ab252463cd7794afc0abecfd0a22bcbfe37 [file] [log] [blame]
Stefan Reinauer1b342262011-01-05 02:27:53 +00001menu "Console"
Hung-Te Linad173ea2013-02-06 21:24:12 +08002
Gabe Blackfbb11cf2013-06-06 00:21:20 -07003config BOOTBLOCK_CONSOLE
4 bool "Enable early (bootblock) console output."
Alexandru Gagniucee464b12015-10-02 18:01:18 -07005 depends on C_ENVIRONMENT_BOOTBLOCK
Stefan Reinauerd2f45c62013-06-19 13:42:00 -07006 default n
Gabe Blackfbb11cf2013-06-06 00:21:20 -07007 help
8 Use console during the bootblock if supported
9
Lee Leahy049b4622016-07-31 11:53:28 -070010config POSTCAR_CONSOLE
11 bool "Enable console output during postcar."
12 depends on POSTCAR_STAGE
13 default n
14 help
15 Use console during the postcar if supported
16
Kyösti Mälkki361cd812013-08-12 23:29:57 +030017config SQUELCH_EARLY_SMP
18 bool "Squelch AP CPUs from early console."
19 default y
Lee Leahyf2ad50fe2016-02-08 16:19:56 -080020 depends on SMP
Kyösti Mälkki361cd812013-08-12 23:29:57 +030021 help
22 When selected only the BSP CPU will output to early console.
23
24 Console drivers have unpredictable behaviour if multiple threads
25 attempt to share the same resources without a spinlock.
26
27 If unsure, say Y.
28
Hung-Te Linad173ea2013-02-06 21:24:12 +080029config CONSOLE_SERIAL
Uwe Hermannd12b7032009-10-16 22:39:55 +000030 bool "Serial port console output"
Stefan Reinauer509f7722012-12-07 17:31:37 -080031 default y
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020032 depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL
Stefan Reinauer509f7722012-12-07 17:31:37 -080033 help
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020034 Send coreboot debug output to a serial port.
David Hendricks6a503b62012-12-31 17:28:43 -080035
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020036 The type of serial port driver selected based on your configuration is
37 shown on the following menu line. Supporting multiple different types
38 of UARTs in one build is not supported.
Stefan Reinauer4885daa2011-04-26 23:47:04 +000039
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020040if CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +000041
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020042 comment "I/O mapped, 8250-compatible"
43 depends on DRIVERS_UART_8250IO
44
45 comment "memory mapped, 8250-compatible"
46 depends on DRIVERS_UART_8250MEM
47
48 comment "device-specific UART"
Hung-Te Linad173ea2013-02-06 21:24:12 +080049 depends on HAVE_UART_SPECIAL
Stefan Reinauer509f7722012-12-07 17:31:37 -080050
Kyösti Mälkki70342a72014-03-14 22:28:29 +020051config UART_FOR_CONSOLE
Kyösti Mälkkid5403772014-05-01 00:02:43 +030052 int "Index for UART port to use for console"
Kyösti Mälkki70342a72014-03-14 22:28:29 +020053 default 0
Martin Rothac76ed92015-11-19 11:40:43 -070054 help
55 Select an I/O port to use for serial console:
56 0 = 0x3f8, 1 = 0x2f8, 2 = 0x3e8, 3 = 0x2e8
Uwe Hermannd12b7032009-10-16 22:39:55 +000057
Kyösti Mälkki70342a72014-03-14 22:28:29 +020058# FIXME: Early programming in romstage is incorrect as we should
59# program different LDN to actually change the physical port.
Uwe Hermannd12b7032009-10-16 22:39:55 +000060config TTYS0_BASE
61 hex
Gabe Black77ffa0d2013-09-30 21:25:49 -070062 depends on DRIVERS_UART
Kyösti Mälkki70342a72014-03-14 22:28:29 +020063 default 0x3f8 if UART_FOR_CONSOLE = 0
64 default 0x2f8 if UART_FOR_CONSOLE = 1
65 default 0x3e8 if UART_FOR_CONSOLE = 2
66 default 0x2e8 if UART_FOR_CONSOLE = 3
Uwe Hermannd12b7032009-10-16 22:39:55 +000067 help
Kyösti Mälkki70342a72014-03-14 22:28:29 +020068 Map the COM port number to the respective I/O port.
Uwe Hermannd12b7032009-10-16 22:39:55 +000069
Martin Rothac76ed92015-11-19 11:40:43 -070070comment "Serial port base address = 0x3f8"
71depends on UART_FOR_CONSOLE = 0
72comment "Serial port base address = 0x2f8"
73depends on UART_FOR_CONSOLE = 1
74comment "Serial port base address = 0x3e8"
75depends on UART_FOR_CONSOLE = 2
76comment "Serial port base address = 0x2e8"
77depends on UART_FOR_CONSOLE = 3
78
Uwe Hermannd12b7032009-10-16 22:39:55 +000079choice
Uwe Hermanna081a3b2009-10-26 23:52:34 +000080 prompt "Baud rate"
Uwe Hermannd12b7032009-10-16 22:39:55 +000081 default CONSOLE_SERIAL_115200
Uwe Hermannd12b7032009-10-16 22:39:55 +000082
Lee Leahycda71b82016-02-20 05:39:10 -080083config CONSOLE_SERIAL_921600
84 bool "921600"
85 help
86 Set serial port Baud rate to 921600.
87config CONSOLE_SERIAL_460800
88 bool "460800"
89 help
90 Set serial port Baud rate to 460800.
91config CONSOLE_SERIAL_230400
92 bool "230400"
93 help
94 Set serial port Baud rate to 230400.
Uwe Hermannd12b7032009-10-16 22:39:55 +000095config CONSOLE_SERIAL_115200
96 bool "115200"
97 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +000098 Set serial port Baud rate to 115200.
Uwe Hermannd12b7032009-10-16 22:39:55 +000099config CONSOLE_SERIAL_57600
100 bool "57600"
101 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000102 Set serial port Baud rate to 57600.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000103config CONSOLE_SERIAL_38400
104 bool "38400"
105 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000106 Set serial port Baud rate to 38400.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000107config CONSOLE_SERIAL_19200
108 bool "19200"
109 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000110 Set serial port Baud rate to 19200.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000111config CONSOLE_SERIAL_9600
112 bool "9600"
113 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000114 Set serial port Baud rate to 9600.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000115
116endchoice
Patrick Georgi0588d192009-08-12 15:00:51 +0000117
Stefan Reinauer509f7722012-12-07 17:31:37 -0800118#FIXME(dhendrix): Change name to SERIAL_BAUD? (Stefan sayz: yes!!)
Patrick Georgi0588d192009-08-12 15:00:51 +0000119config TTYS0_BAUD
Uwe Hermannd12b7032009-10-16 22:39:55 +0000120 int
Lee Leahycda71b82016-02-20 05:39:10 -0800121 default 921600 if CONSOLE_SERIAL_921600
122 default 460800 if CONSOLE_SERIAL_460800
123 default 230400 if CONSOLE_SERIAL_230400
Uwe Hermannd12b7032009-10-16 22:39:55 +0000124 default 115200 if CONSOLE_SERIAL_115200
125 default 57600 if CONSOLE_SERIAL_57600
126 default 38400 if CONSOLE_SERIAL_38400
127 default 19200 if CONSOLE_SERIAL_19200
128 default 9600 if CONSOLE_SERIAL_9600
129 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000130 Map the Baud rates to an integer.
Patrick Georgi0588d192009-08-12 15:00:51 +0000131
Uwe Hermann168b11b2009-10-07 16:15:40 +0000132# TODO: Allow user-friendly selection of settings other than 8n1.
Patrick Georgi0e9a9252009-10-06 20:48:07 +0000133config TTYS0_LCS
134 int
135 default 3
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +0200136 depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM
137
138endif # CONSOLE_SERIAL
Patrick Georgi0e9a9252009-10-06 20:48:07 +0000139
Vladimir Serbinenko45988da2013-03-30 02:02:13 +0100140config SPKMODEM
141 bool "spkmodem (console on speaker) console output"
142 default n
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100143 depends on ARCH_X86
Vladimir Serbinenko45988da2013-03-30 02:02:13 +0100144 help
145 Send coreboot debug output through speaker
146
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200147config CONSOLE_USB
148 bool "USB dongle console output"
149 depends on USBDEBUG
Kyösti Mälkki8101aa62013-08-15 16:27:06 +0300150 default n
Uwe Hermann168b11b2009-10-07 16:15:40 +0000151 help
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200152 Send coreboot debug output to USB.
Uwe Hermann168b11b2009-10-07 16:15:40 +0000153
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200154 Configuration for USB hardware is under menu Generic Drivers.
Kyösti Mälkkid2dac0a2013-08-23 23:33:16 +0300155
Uwe Hermann168b11b2009-10-07 16:15:40 +0000156# TODO: Deps?
157# TODO: Improve description.
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000158config ONBOARD_VGA_IS_PRIMARY
Uwe Hermann168b11b2009-10-07 16:15:40 +0000159 bool "Use onboard VGA as primary video device"
Myles Watson45bb25f2009-09-22 18:49:08 +0000160 default n
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100161 depends on PCI
Myles Watson45bb25f2009-09-22 18:49:08 +0000162 help
163 If not selected, the last adapter found will be used.
164
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000165config CONSOLE_NE2K
166 bool "Network console over NE2000 compatible Ethernet adapter"
167 default n
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100168 depends on PCI
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000169 help
170 Send coreboot debug output to a Ethernet console, it works
171 same way as Linux netconsole, packets are received to UDP
172 port 6666 on IP/MAC specified with options bellow.
173 Use following netcat command: nc -u -l -p 6666
174
175config CONSOLE_NE2K_DST_MAC
176 depends on CONSOLE_NE2K
177 string "Destination MAC address of remote system"
178 default "00:13:d4:76:a2:ac"
179 help
180 Type in either MAC address of logging system or MAC address
181 of the router.
182
183config CONSOLE_NE2K_DST_IP
184 depends on CONSOLE_NE2K
185 string "Destination IP of logging system"
186 default "10.0.1.27"
187 help
Daniele Forsi53847a22014-07-22 18:00:56 +0200188 This is IP address of the system running for example
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000189 netcat command to dump the packets.
190
191config CONSOLE_NE2K_SRC_IP
192 depends on CONSOLE_NE2K
Stefan Reinauerd6b4f1c2010-09-23 18:29:40 +0000193 string "IP address of coreboot system"
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000194 default "10.0.1.253"
195 help
Stefan Reinauerd6b4f1c2010-09-23 18:29:40 +0000196 This is the IP of the coreboot system
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000197
198config CONSOLE_NE2K_IO_PORT
199 depends on CONSOLE_NE2K
200 hex "NE2000 adapter fixed IO port address"
201 default 0xe00
202 help
203 This is the IO port address for the IO port
204 on the card, please select some non-conflicting region,
205 32 bytes of IO spaces will be used (and align on 32 bytes
206 boundary, qemu needs broader align)
207
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700208config CONSOLE_CBMEM
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700209 bool "Send console output to a CBMEM buffer"
Paul Menzel60ef4562014-03-08 10:46:52 +0100210 default y
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700211 help
212 Enable this to save the console output in a CBMEM buffer. This would
213 allow to see coreboot console output from Linux space.
214
Kyösti Mälkki8659e402014-12-21 08:55:47 +0200215if CONSOLE_CBMEM
216
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700217config CONSOLE_CBMEM_BUFFER_SIZE
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700218 hex "Room allocated for console output in CBMEM"
Vladimir Serbinenkoeb67a042014-09-13 20:55:58 +0200219 default 0x20000
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700220 help
221 Space allocated for console output storage in CBMEM. The default
Vladimir Serbinenkoeb67a042014-09-13 20:55:58 +0200222 value (128K or 0x20000 bytes) is large enough to accommodate
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700223 even the BIOS_SPEW level.
224
Vadim Bendebury6e20e2f2015-04-10 18:04:04 -0700225config CONSOLE_CBMEM_DUMP_TO_UART
226 depends on !CONSOLE_SERIAL
227 bool "Dump CBMEM console on resets"
228 default n
229 help
230 Enable this to have CBMEM console buffer contents dumped on the
231 serial output in case serial console is disabled and the device
232 resets itself while trying to boot the payload.
233
Kyösti Mälkki8659e402014-12-21 08:55:47 +0200234endif
235
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200236config CONSOLE_QEMU_DEBUGCON
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200237 bool "QEMU debug console output"
238 depends on BOARD_EMULATION_QEMU_X86
239 default y
240 help
241 Send coreboot debug output to QEMU's isa-debugcon device:
242
243 qemu-system-x86_64 \
244 -chardev file,id=debugcon,path=/dir/file.log \
245 -device isa-debugcon,iobase=0x402,chardev=debugcon
246
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200247config CONSOLE_QEMU_DEBUGCON_PORT
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200248 hex "QEMU debug console port"
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200249 depends on CONSOLE_QEMU_DEBUGCON
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200250 default 0x402
251
Martin Roth3a543182015-09-28 15:27:24 -0600252config SPI_CONSOLE
253 bool "SPI debug console output"
254 depends on HAVE_SPI_CONSOLE_SUPPORT && !DEBUG_SPI_FLASH
255 help
256 Enable support for the debug console on the Dediprog EM100Pro.
257 This is currently working only in ramstage due to how the spi
258 drivers are written.
259
Uwe Hermann7fe41912009-10-11 13:35:24 +0000260choice
Myles Watson03646182009-10-16 19:29:45 +0000261 prompt "Default console log level"
262 default DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermann7fe41912009-10-11 13:35:24 +0000263
264config DEFAULT_CONSOLE_LOGLEVEL_8
Myles Watson03646182009-10-16 19:29:45 +0000265 bool "8: SPEW"
Myles Watson03646182009-10-16 19:29:45 +0000266 help
267 Way too many details.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000268config DEFAULT_CONSOLE_LOGLEVEL_7
Myles Watson03646182009-10-16 19:29:45 +0000269 bool "7: DEBUG"
Myles Watson03646182009-10-16 19:29:45 +0000270 help
271 Debug-level messages.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000272config DEFAULT_CONSOLE_LOGLEVEL_6
Myles Watson03646182009-10-16 19:29:45 +0000273 bool "6: INFO"
Myles Watson03646182009-10-16 19:29:45 +0000274 help
275 Informational messages.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000276config DEFAULT_CONSOLE_LOGLEVEL_5
Myles Watson03646182009-10-16 19:29:45 +0000277 bool "5: NOTICE"
Myles Watson03646182009-10-16 19:29:45 +0000278 help
279 Normal but significant conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000280config DEFAULT_CONSOLE_LOGLEVEL_4
Myles Watson03646182009-10-16 19:29:45 +0000281 bool "4: WARNING"
Myles Watson03646182009-10-16 19:29:45 +0000282 help
283 Warning conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000284config DEFAULT_CONSOLE_LOGLEVEL_3
Myles Watson03646182009-10-16 19:29:45 +0000285 bool "3: ERR"
Myles Watson03646182009-10-16 19:29:45 +0000286 help
287 Error conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000288config DEFAULT_CONSOLE_LOGLEVEL_2
Myles Watson03646182009-10-16 19:29:45 +0000289 bool "2: CRIT"
Myles Watson03646182009-10-16 19:29:45 +0000290 help
291 Critical conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000292config DEFAULT_CONSOLE_LOGLEVEL_1
Myles Watson03646182009-10-16 19:29:45 +0000293 bool "1: ALERT"
Myles Watson03646182009-10-16 19:29:45 +0000294 help
295 Action must be taken immediately.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000296config DEFAULT_CONSOLE_LOGLEVEL_0
Myles Watson03646182009-10-16 19:29:45 +0000297 bool "0: EMERG"
298 help
299 System is unusable.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000300
301endchoice
302
Patrick Georgi0588d192009-08-12 15:00:51 +0000303config DEFAULT_CONSOLE_LOGLEVEL
Uwe Hermann7fe41912009-10-11 13:35:24 +0000304 int
305 default 0 if DEFAULT_CONSOLE_LOGLEVEL_0
306 default 1 if DEFAULT_CONSOLE_LOGLEVEL_1
307 default 2 if DEFAULT_CONSOLE_LOGLEVEL_2
308 default 3 if DEFAULT_CONSOLE_LOGLEVEL_3
309 default 4 if DEFAULT_CONSOLE_LOGLEVEL_4
310 default 5 if DEFAULT_CONSOLE_LOGLEVEL_5
311 default 6 if DEFAULT_CONSOLE_LOGLEVEL_6
312 default 7 if DEFAULT_CONSOLE_LOGLEVEL_7
313 default 8 if DEFAULT_CONSOLE_LOGLEVEL_8
314 help
315 Map the log level config names to an integer.
Patrick Georgi0588d192009-08-12 15:00:51 +0000316
Stefan Reinauerc719f1a2010-03-30 09:57:28 +0000317config NO_POST
318 bool "Don't show any POST codes"
319 default n
320
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700321config CMOS_POST
322 bool "Store post codes in CMOS for debugging"
Stefan Reinauerc2d5a162012-12-06 14:25:27 -0800323 depends on !NO_POST && PC80_SYSTEM
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700324 default n
325 help
326 If enabled, coreboot will store post codes in CMOS and switch between
327 two offsets on each boot so the last post code in the previous boot
328 can be retrieved. This uses 3 bytes of CMOS.
329
330config CMOS_POST_OFFSET
331 hex "Offset into CMOS to store POST codes"
332 depends on CMOS_POST
Martin Roth3b878122016-09-30 14:43:01 -0600333 default 0x0
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700334 help
335 If CMOS_POST is enabled then an offset into CMOS must be provided.
336 If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value
337 defined in the mainboard option table.
338
Duncan Lauried5686fe2013-06-10 10:21:41 -0700339config CMOS_POST_EXTRA
340 bool "Store extra logging info into CMOS"
341 depends on CMOS_POST
342 default n
343 help
344 This will enable extra logging of work that happens between post
345 codes into CMOS for debug. This uses an additional 8 bytes of CMOS.
346
Daniele Forsiad488d22014-07-30 12:23:35 +0200347config CONSOLE_POST
Idwer Vollering5809a732014-03-11 15:36:21 +0000348 bool "Show POST codes on the debug console"
349 depends on !NO_POST
350 default n
351 help
352 If enabled, coreboot will additionally print POST codes (which are
353 usually displayed using a so-called "POST card" ISA/PCI/PCI-E
354 device) on the debug console.
355
356config POST_DEVICE
357 bool "Send POST codes to an external device"
358 depends on !NO_POST
359 default y
360
361choice
362 prompt "Device to send POST codes to"
363 depends on POST_DEVICE
364 default POST_DEVICE_NONE
365
366config POST_DEVICE_NONE
367 bool "None"
368config POST_DEVICE_LPC
369 bool "LPC"
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100370 depends on PCI
Idwer Vollering5809a732014-03-11 15:36:21 +0000371config POST_DEVICE_PCI_PCIE
372 bool "PCI/PCIe"
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100373 depends on PCI
Idwer Vollering5809a732014-03-11 15:36:21 +0000374endchoice
375
376config POST_IO
David Hendricks6b908d02012-11-05 12:34:09 -0800377 bool "Send POST codes to an IO port"
Idwer Vollering5809a732014-03-11 15:36:21 +0000378 depends on PC80_SYSTEM && !NO_POST
David Hendricks6b908d02012-11-05 12:34:09 -0800379 default y
380 help
381 If enabled, POST codes will be written to an IO port.
Stefan Reinauerc719f1a2010-03-30 09:57:28 +0000382
Idwer Vollering5809a732014-03-11 15:36:21 +0000383config POST_IO_PORT
384 depends on POST_IO
David Hendricks6b908d02012-11-05 12:34:09 -0800385 hex "IO port for POST codes"
386 default 0x80
387 help
388 POST codes on x86 are typically written to the LPC bus on port
Daniele Forsi53847a22014-07-22 18:00:56 +0200389 0x80. However, it may be desirable to change the port number
David Hendricks6b908d02012-11-05 12:34:09 -0800390 depending on the presence of coprocessors/microcontrollers or if the
391 platform does not support IO in the conventional x86 manner.
392
Martin Roth14554372015-11-12 14:02:42 -0700393config NO_EARLY_BOOTBLOCK_POSTCODES
394 def_bool n
395 help
396 Some chipsets require that the routing for the port 80h POST
397 code be configured before any POST codes are sent out.
398 This can be done in the boot block, but there are a couple of
399 POST codes that go out before the chipset's bootblock initialization
400 can happen. This option suppresses those POST codes.
401
Nico Huberc83239e2016-10-05 17:46:49 +0200402config HWBASE_DEBUG_CB
403 bool
404 default y if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
405 default n
406
407config HWBASE_DEBUG_NULL
408 def_bool y
409 depends on !HWBASE_DEBUG_CB
410
David Hendricks6b908d02012-11-05 12:34:09 -0800411endmenu