blob: d879db94fca5826c71aafa2a93c15392e0ce6386 [file] [log] [blame]
Angel Ponsfabfe9d2020-04-05 15:47:07 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Aamir Bohradd7acaa2020-03-25 11:36:22 +05302
Aamir Bohradd7acaa2020-03-25 11:36:22 +05303#include <device/mmio.h>
4#include <bootstate.h>
5#include <console/console.h>
6#include <console/post_codes.h>
7#include <cpu/x86/smm.h>
8#include <device/pci.h>
9#include <intelblocks/lpc_lib.h>
10#include <intelblocks/pcr.h>
Subrata Banik0359d9d2020-09-28 18:43:47 +053011#include <intelblocks/pmclib.h>
Aamir Bohradd7acaa2020-03-25 11:36:22 +053012#include <intelblocks/tco.h>
13#include <intelblocks/thermal.h>
Aamir Bohradd7acaa2020-03-25 11:36:22 +053014#include <spi-generic.h>
15#include <soc/p2sb.h>
16#include <soc/pci_devs.h>
17#include <soc/pcr_ids.h>
18#include <soc/pm.h>
19#include <soc/smbus.h>
20#include <soc/soc_chip.h>
21#include <soc/systemagent.h>
22
23#define CAMERA1_CLK 0x8000 /* Camera 1 Clock */
24#define CAMERA2_CLK 0x8080 /* Camera 2 Clock */
25#define CAM_CLK_EN (1 << 1)
26#define MIPI_CLK (1 << 0)
27#define HDPLL_CLK (0 << 0)
28
29static void pch_enable_isclk(void)
30{
31 pcr_or32(PID_ISCLK, CAMERA1_CLK, CAM_CLK_EN | MIPI_CLK);
32 pcr_or32(PID_ISCLK, CAMERA2_CLK, CAM_CLK_EN | MIPI_CLK);
33}
34
35static void pch_handle_sideband(config_t *config)
36{
37 if (config->pch_isclk)
38 pch_enable_isclk();
39}
40
41static void pch_finalize(void)
42{
Aamir Bohradd7acaa2020-03-25 11:36:22 +053043 config_t *config;
Aamir Bohradd7acaa2020-03-25 11:36:22 +053044
45 /* TCO Lock down */
46 tco_lockdown();
47
48 /* TODO: Add Thermal Configuration */
49
50 /*
51 * Disable ACPI PM timer based on dt policy
52 *
53 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
54 * Disabling ACPI PM timer also switches off TCO
55 *
56 * SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is
57 * just required to get to chip config. PCH_DEV_PMC is hidden by this
58 * point and hence removed from the root bus. pcidev_path_on_root thus
59 * returns NULL for PCH_DEV_PMC device.
60 */
61 config = config_of_soc();
Subrata Banik0359d9d2020-09-28 18:43:47 +053062 if (config->PmTimerDisabled)
63 pmc_disable_acpi_timer();
Aamir Bohradd7acaa2020-03-25 11:36:22 +053064
Aamir Bohradd7acaa2020-03-25 11:36:22 +053065 pch_handle_sideband(config);
66
67 pmc_clear_pmcon_sts();
68}
69
70static void soc_finalize(void *unused)
71{
72 printk(BIOS_DEBUG, "Finalizing chipset.\n");
73
74 pch_finalize();
Kyösti Mälkkib6585482020-06-01 15:11:14 +030075 apm_control(APM_CNT_FINALIZE);
Aamir Bohradd7acaa2020-03-25 11:36:22 +053076
77 /* Indicate finalize step with post code */
78 post_code(POST_OS_BOOT);
79}
80
81BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, soc_finalize, NULL);
82BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, soc_finalize, NULL);