blob: 01155016c53b459c57d7b74154670c9110448b27 [file] [log] [blame]
Vladimir Serbinenkoc6f6be02013-11-12 22:32:08 +01001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2010 Google Inc.
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
8# the Free Software Foundation; version 2 of the License.
9#
10# This program is distributed in the hope that it will be useful,
11# but WITHOUT ANY WARRANTY; without even the implied warranty of
12# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13# GNU General Public License for more details.
14#
15# You should have received a copy of the GNU General Public License
16# along with this program; if not, write to the Free Software
17# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18#
19
20ramstage-y += northbridge.c
21ramstage-y += gma.c
22
23ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
24ramstage-y += ../sandybridge/mrccache.c
25
26romstage-y += raminit.c
27romstage-y += early_init.c
28romstage-y += ../sandybridge/mrccache.c
29romstage-y += ../../../arch/x86/lib/walkcbfs.S
30
31smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
32
33$(obj)/mrc.cache:
34 dd if=/dev/zero count=1 \
35 bs=$(shell printf "%d" $(CONFIG_TRAINING_CACHE_SIZE) ) | \
36 tr '\000' '\377' > $@
37
38cbfs-files-y += mrc.cache
39mrc.cache-file := $(obj)/mrc.cache
Vladimir Serbinenko82926e12014-01-18 02:05:17 +010040mrc.cache-position := 0xfffe0000
Vladimir Serbinenkoc6f6be02013-11-12 22:32:08 +010041mrc.cache-type := 0xac
42
43$(obj)/northbridge/intel/nehalem/acpi.ramstage.o : $(obj)/build.h