Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; version 2 of the License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <stdint.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 17 | #include <device/pci.h> |
| 18 | #include <device/pci_ids.h> |
| 19 | #include <console/console.h> |
| 20 | #include <soc/pci_devs.h> |
| 21 | #include <soc/ramstage.h> |
| 22 | |
| 23 | /** |
| 24 | * Read the base address registers for a given device. |
| 25 | * |
| 26 | * @param dev Pointer to the dev structure. |
| 27 | * @param howmany How many registers to read. |
| 28 | */ |
| 29 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
| 30 | { |
| 31 | unsigned long index; |
| 32 | |
| 33 | for (index = PCI_BASE_ADDRESS_0; |
| 34 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
| 35 | struct resource *resource; |
| 36 | resource = pci_get_resource(dev, index); |
| 37 | /** |
Jonathan Neuschäfer | 5268b76 | 2018-02-12 12:24:25 +0100 | [diff] [blame] | 38 | * Workaround for Denverton-NS silicon (Rev A0/A1 for CSME/IE, |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 39 | * Rev B0 for CSME only) |
| 40 | * CSME&IEs KT IO bar must be 16-byte aligned |
| 41 | */ |
| 42 | if ((resource->flags & IORESOURCE_IO) && |
| 43 | (resource->align != 4)) { |
| 44 | printk(BIOS_DEBUG, |
| 45 | "CSME&IEs KT IO bar must be 16-byte aligned!\n"); |
| 46 | resource->align = 4; |
| 47 | resource->gran = 4; |
| 48 | resource->size = 16; |
| 49 | } |
| 50 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
| 51 | } |
| 52 | |
| 53 | compact_resources(dev); |
| 54 | } |
| 55 | |
Elyes HAOUAS | 951d9f6 | 2018-09-19 14:57:42 +0200 | [diff] [blame] | 56 | static void pci_csme_ie_kt_read_resources(struct device *dev) |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 57 | { |
| 58 | /** |
Jonathan Neuschäfer | 5268b76 | 2018-02-12 12:24:25 +0100 | [diff] [blame] | 59 | * CSME/IE KT has 2 BARs to check: |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 60 | * 0x10 - KT IO BAR |
| 61 | * 0x14 - KT Memory BAR |
| 62 | * CSME/IE KT has no Expansion ROM BAR to check: |
| 63 | * 0x30 - KT Host XRBAR, READ ONLY |
| 64 | */ |
| 65 | pci_read_bases(dev, 2); |
| 66 | } |
| 67 | |
| 68 | static struct device_operations csme_ie_kt_ops = { |
| 69 | .read_resources = pci_csme_ie_kt_read_resources, |
| 70 | .set_resources = pci_dev_set_resources, |
| 71 | .enable_resources = pci_dev_enable_resources, |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 72 | .ops_pci = &soc_pci_ops, |
| 73 | }; |
| 74 | |
| 75 | static const unsigned short pci_device_ids[] = { |
Felix Singer | dbc90df | 2019-11-22 00:10:20 +0100 | [diff] [blame] | 76 | PCI_DEVICE_ID_INTEL_DENVERTON_ME_KT, |
| 77 | PCI_DEVICE_ID_INTEL_DENVERTON_IE_KT, |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 78 | 0 |
| 79 | }; |
| 80 | |
| 81 | static const struct pci_driver csme_ie_kt __pci_driver = { |
| 82 | .ops = &csme_ie_kt_ops, |
| 83 | .vendor = PCI_VENDOR_ID_INTEL, |
| 84 | .devices = pci_device_ids, |
| 85 | }; |